arch/arm64/include/asm/kvm_emulate.h

146

return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT);

arch/arm64/include/asm/kvm_emulate.h

159

*vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT;

arch/arm64/include/asm/kvm_emulate.h

306

mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK;

arch/arm64/include/asm/kvm_emulate.h

310

mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;

arch/arm64/include/asm/kvm_emulate.h

512

*vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT;

arch/arm64/include/asm/kvm_emulate.h

531

return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT);

arch/arm64/kvm/at.c

1260

(*vcpu_cpsr(vcpu) & PSR_PAN_BIT);

arch/arm64/kvm/at.c

627

write_sysreg_s(*vcpu_cpsr(vcpu) & PSTATE_PAN, SYS_PSTATE_PAN);

arch/arm64/kvm/debug.c

181

if (*vcpu_cpsr(vcpu) & DBG_SPSR_SS)

arch/arm64/kvm/debug.c

187

*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;

arch/arm64/kvm/debug.c

189

*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;

arch/arm64/kvm/debug.c

215

if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS))

arch/arm64/kvm/debug.c

221

*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;

arch/arm64/kvm/debug.c

223

*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;

arch/arm64/kvm/emulate-nested.c

2679

spsr = *vcpu_cpsr(vcpu);

arch/arm64/kvm/emulate-nested.c

2728

*vcpu_cpsr(vcpu) = spsr;

arch/arm64/kvm/emulate-nested.c

2782

pstate = *vcpu_cpsr(vcpu);

arch/arm64/kvm/guest.c

277

if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) {

arch/arm64/kvm/guest.c

280

switch (*vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK) {

arch/arm64/kvm/handle_exit.c

209

*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;

arch/arm64/kvm/hyp/aarch32.c

113

unsigned long cpsr = *vcpu_cpsr(vcpu);

arch/arm64/kvm/hyp/aarch32.c

133

*vcpu_cpsr(vcpu) = cpsr;

arch/arm64/kvm/hyp/aarch32.c

145

is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT);

arch/arm64/kvm/hyp/aarch32.c

76

cpsr = *vcpu_cpsr(vcpu);

arch/arm64/kvm/hyp/exception.c

120

old = *vcpu_cpsr(vcpu);

arch/arm64/kvm/hyp/exception.c

164

*vcpu_cpsr(vcpu) = new;

arch/arm64/kvm/hyp/exception.c

191

old = *vcpu_cpsr(vcpu);

arch/arm64/kvm/hyp/exception.c

282

unsigned long spsr = *vcpu_cpsr(vcpu);

arch/arm64/kvm/hyp/exception.c

287

*vcpu_cpsr(vcpu) = get_except32_cpsr(vcpu, mode);

arch/arm64/kvm/hyp/exception.c

91

mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);

arch/arm64/kvm/hyp/include/hyp/adjust_pc.h

22

*vcpu_cpsr(vcpu) &= ~PSR_BTYPE_MASK;

arch/arm64/kvm/hyp/include/hyp/adjust_pc.h

26

*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;

arch/arm64/kvm/hyp/include/hyp/switch.h

426

*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;

arch/arm64/kvm/hyp/include/hyp/switch.h

427

write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);

arch/arm64/kvm/hyp/include/hyp/switch.h

866

*vcpu_cpsr(vcpu) & DBG_SPSR_SS &&

arch/arm64/kvm/hyp/include/hyp/switch.h

868

write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

249

*vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

264

write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);

arch/arm64/kvm/hyp/vhe/switch.c

549

u64 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);

arch/arm64/kvm/hyp/vhe/switch.c

560

*vcpu_cpsr(vcpu) &= ~(PSR_MODE_MASK | PSR_MODE32_BIT);

arch/arm64/kvm/hyp/vhe/switch.c

561

*vcpu_cpsr(vcpu) |= mode;

arch/arm64/kvm/inject_fault.c

107

unsigned long cpsr = *vcpu_cpsr(vcpu);

arch/arm64/kvm/inject_fault.c

245

return (*vcpu_cpsr(vcpu) & PSR_A_BIT) &&

arch/arm64/kvm/inject_fault.c

30

switch(*vcpu_cpsr(vcpu) & PSR_MODE_MASK) {

arch/arm64/kvm/inject_fault.c

336

return (*vcpu_cpsr(vcpu) & PSR_A_BIT) && !effective_sctlr2_nmea(vcpu);

arch/arm64/kvm/inject_fault.c

354

return *vcpu_cpsr(vcpu) & PSR_A_BIT;

arch/arm64/kvm/sys_regs.c

4734

cp, *vcpu_pc(vcpu), *vcpu_cpsr(vcpu));

arch/arm64/kvm/sys_regs.c

4993

*vcpu_pc(vcpu), *vcpu_cpsr(vcpu));

arch/arm64/kvm/trace_arm.h

379

__entry->spsr_el2 = *vcpu_cpsr(vcpu);

arch/arm64/kvm/trace_arm.h

381

__entry->source_mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);