tmp3
long error, tmp1, tmp2, tmp3, tmp4;
"=&r"(tmp3), "=&r"(tmp4)
"=&r"(tmp3), "=&r"(tmp4)
"=&r"(tmp3), "=&r"(tmp4)
unsigned long tmp1, tmp2, tmp3, tmp4;
"=&r"(tmp3), "=&r"(tmp4)
"=&r"(tmp3), "=&r"(tmp4)
"=&r"(tmp3), "=&r"(tmp4)
unsigned long tmp1, tmp2, tmp3, tmp4;
"=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
"=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
unsigned long tmp1, tmp2, tmp3, tmp4;
"=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
"=r"(tmp1), "=r"(tmp2), "=r"(tmp3), "=r"(tmp4)
.macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
.macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
.macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3
.macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3
.macro __ptrauth_keys_install_user tsk, tmp1, tmp2, tmp3
.macro __ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_init_cpu tsk, tmp1, tmp2, tmp3
.macro ptrauth_keys_install_user tsk, tmp1, tmp2, tmp3
__uint128_t tmp1, tmp2, tmp3, tmp4;
tmp3 = *(__uint128_t *)(ptr + 4);
tmp3 += (tmp3 >> 64) | (tmp3 << 64);
tmp3 = ((tmp3 >> 64) << 64) | (tmp4 >> 64);
tmp3 += (tmp3 >> 64) | (tmp3 << 64);
tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64);
const u8 tmp3 = bpf2a64[TMP_REG_3];
emit(A64_ADD(1, tmp3, dst, arena_vm_base), ctx);
dst = tmp3;
const u8 tmp3 = bpf2a64[TMP_REG_3];
emit(A64_STXR(isdw, tmp2, reg, tmp3), ctx);
emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
emit(A64_STLXR(isdw, tmp2, reg, tmp3), ctx);
emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
emit(A64_STLXR(isdw, tmp2, reg, tmp3), ctx);
emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
emit(A64_EOR(isdw, tmp3, r0, tmp2), ctx);
emit(A64_CBNZ(isdw, tmp3, jmp_offset), ctx);
emit(A64_STLXR(isdw, src, reg, tmp3), ctx);
emit(A64_CBNZ(0, tmp3, jmp_offset), ctx);
unsigned long tmp3, tmp4;
: "=a"(tmp1), "=a"(tmp2), "=a"(tmp3),
unsigned long tmp3, tmp4;
: "=a"(tmp1), "=a"(tmp2), "=a"(tmp3),
__uint128_t tmp1, tmp2, tmp3, tmp4;
tmp3 = *(__uint128_t *)(ptr + 4);
tmp3 += (tmp3 >> 64) | (tmp3 << 64);
tmp3 = ((tmp3 >> 64) << 64) | (tmp4 >> 64);
tmp3 += (tmp3 >> 64) | (tmp3 << 64);
tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64);
unsigned long tmp1, tmp2, tmp3;
: "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
.macro update_user_segments_by_4 tmp1 tmp2 tmp3 tmp4
int tmp2, tmp3, tmp4, tmp5, tmp6;
"=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
int tmp2, tmp3, tmp4, tmp5, tmp6;
"=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
unsigned long ret, tmp1, tmp2, tmp3;
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
UDItype tmp1, tmp2, tmp3, tmp4; \
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
const u8 tmp3 = bpf2sparc[TMP_REG_3];
emit_alu3(ADD, tmp2, src, tmp3, ctx);
emit(CAS | ASI(ASI_P) | RS1(tmp) | RS2(tmp2) | RD(tmp3), ctx);
emit_cmp(tmp2, tmp3, ctx);
const u8 tmp3 = bpf2sparc[TMP_REG_3];
emit_alu3(ADD, tmp2, src, tmp3, ctx);
emit(CASX | ASI(ASI_P) | RS1(tmp) | RS2(tmp2) | RD(tmp3), ctx);
emit_cmp(tmp2, tmp3, ctx);
unsigned long tmp0, tmp1, tmp2, tmp3;
"=&a"(tmp3)
uint16_t tmp3 = 0;
&tmp3);
tmp3 = (tmp3 >> 5) & 0x3;
data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3;
tmp3 = read_reg_dw(adapter, 0x71c);
dprintk("%s: tmp3 = %x\n", __func__, tmp3);
tmp3--;
if (tmp3 != 0) {
u32 mac_per = 6400, tmp1, tmp2, tmp3;
tmp3 = tmp1 * tmp2 / 1000;
return (tmp3 + 2000 + 999) / 1000 + addition;
unsigned long tmp2, tmp3;
tmp3 = hw->mac.addr[5];
tmp3 = (tmp3 << 8) | hw->mac.addr[4];
tmp3 = (tmp3 << 8) | hw->mac.addr[3];
tmp3 = (tmp3 << 8) | hw->mac.addr[2];
iowrite32(tmp3, &hw->reg->PAUSE_PKT3);
int prod, ipwr, qpwr, prod_msb, q_msb, tmp1, tmp2, tmp3, tmp4, ret;
tmp3 = ((prod << (30 - prod_msb)) + (ipwr >> (1 + tmp1))) /
tmp3 = ((prod << (30 - prod_msb)) + (ipwr << (-1 - tmp1))) /
tmp4 -= tmp3 * tmp3;
c0 = tmp3 >> 3;
u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
tmp3 = tmp2 * channel2freq_lp(channel);
tmp3 *= 2;
tmp6 = tmp3 / tmp4;
tmp7 = tmp3 % tmp4;
tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1);
u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
tmp3 = ((41 * (val3 - 3000)) /1200) + 27;
if ((tmp4 + tmp3 - 1) / tmp3 > 60) {
tmp5 = ((tmp4 + tmp3) / (tmp3 << 1)) - 8;
tmp5 = ((tmp4 + (tmp3 >> 1)) / tmp3) - 8;
u64 tmp3;
tmp3 = tmp[3U];
tmp[3U] = tmp3 & (u64)0x7fffffffffffffffU;
u16 tmp3;
pci_read_config_word(pci, 0x40, &tmp3);
pci_write_config_word(pci, 0x40, tmp3 | 0x10);