arch/arm/mach-rpc/dma.c

207

int tcr, speed;

arch/arm/mach-rpc/dma.c

218

tcr = iomd_readb(IOMD_DMATCR);

arch/arm/mach-rpc/dma.c

223

tcr = (tcr & ~0x03) | speed;

arch/arm/mach-rpc/dma.c

227

tcr = (tcr & ~0x0c) | (speed << 2);

arch/arm/mach-rpc/dma.c

231

tcr = (tcr & ~0x30) | (speed << 4);

arch/arm/mach-rpc/dma.c

235

tcr = (tcr & ~0xc0) | (speed << 6);

arch/arm/mach-rpc/dma.c

242

iomd_writeb(tcr, IOMD_DMATCR);

arch/arm64/include/asm/assembler.h

346

.macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1

arch/arm64/include/asm/assembler.h

637

.macro tcr_clear_errata_bits, tcr, tmp1, tmp2

arch/arm64/include/asm/kvm_nested.h

23

static inline u64 translate_tcr_el2_to_tcr_el1(u64 tcr)

arch/arm64/include/asm/kvm_nested.h

26

((tcr & TCR_EL2_TBI) ? TCR_TBI0 : 0) |

arch/arm64/include/asm/kvm_nested.h

27

tcr_el2_ps_to_tcr_el1_ips(tcr) |

arch/arm64/include/asm/kvm_nested.h

28

(tcr & TCR_EL2_TG0_MASK) |

arch/arm64/include/asm/kvm_nested.h

29

(tcr & TCR_EL2_ORGN0_MASK) |

arch/arm64/include/asm/kvm_nested.h

30

(tcr & TCR_EL2_IRGN0_MASK) |

arch/arm64/include/asm/kvm_nested.h

31

(tcr & TCR_EL2_T0SZ_MASK);

arch/arm64/include/asm/memory.h

228

u64 tcr;

arch/arm64/include/asm/memory.h

231

asm("mrs %0, tcr_el1" : "=r"(tcr));

arch/arm64/include/asm/memory.h

232

return tcr;

arch/arm64/include/asm/mmu_context.h

69

unsigned long tcr = read_sysreg(tcr_el1);

arch/arm64/include/asm/mmu_context.h

71

if ((tcr & TCR_EL1_T0SZ_MASK) == t0sz)

arch/arm64/include/asm/mmu_context.h

74

tcr &= ~TCR_EL1_T0SZ_MASK;

arch/arm64/include/asm/mmu_context.h

75

tcr |= t0sz;

arch/arm64/include/asm/mmu_context.h

76

write_sysreg(tcr, tcr_el1);

arch/arm64/kernel/cpufeature.c

1974

u64 tcr = read_sysreg(tcr_el1) | TCR_EL1_HD;

arch/arm64/kernel/cpufeature.c

1976

write_sysreg(tcr, tcr_el1);

arch/arm64/kernel/pi/map_kernel.c

144

u64 tcr = read_sysreg(tcr_el1) | TCR_EL1_DS;

arch/arm64/kernel/pi/map_kernel.c

149

tcr &= ~TCR_EL1_IPS_MASK;

arch/arm64/kernel/pi/map_kernel.c

150

tcr |= parange << TCR_EL1_IPS_SHIFT;

arch/arm64/kernel/pi/map_kernel.c

162

:: "r"(sctlr & ~SCTLR_ELx_M), "r"(ttbr), "r"(tcr), "r"(sctlr));

arch/arm64/kvm/arm.c

2063

unsigned long tcr;

arch/arm64/kvm/arm.c

2076

tcr = read_sysreg(tcr_el1);

arch/arm64/kvm/arm.c

2078

tcr &= ~(TCR_HD | TCR_HA | TCR_A1 | TCR_T0SZ_MASK);

arch/arm64/kvm/arm.c

2079

tcr |= TCR_EPD1_MASK;

arch/arm64/kvm/arm.c

2081

unsigned long ips = FIELD_GET(TCR_IPS_MASK, tcr);

arch/arm64/kvm/arm.c

2083

tcr &= TCR_EL2_MASK;

arch/arm64/kvm/arm.c

2084

tcr |= TCR_EL2_RES1 | FIELD_PREP(TCR_EL2_PS_MASK, ips);

arch/arm64/kvm/arm.c

2086

tcr |= TCR_EL2_DS;

arch/arm64/kvm/arm.c

2088

tcr |= TCR_T0SZ(hyp_va_bits);

arch/arm64/kvm/arm.c

2089

params->tcr_el2 = tcr;

arch/arm64/kvm/at.c

141

u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr;

arch/arm64/kvm/at.c

159

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/at.c

167

tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/at.c

178

wi->txsz = FIELD_GET(TCR_T1SZ_MASK, tcr);

arch/arm64/kvm/at.c

179

tg = FIELD_GET(TCR_TG1_MASK, tcr);

arch/arm64/kvm/at.c

191

wi->txsz = FIELD_GET(TCR_T0SZ_MASK, tcr);

arch/arm64/kvm/at.c

192

tg = FIELD_GET(TCR_TG0_MASK, tcr);

arch/arm64/kvm/at.c

205

wi->pa52bit = has_52bit_pa(vcpu, wi, tcr);

arch/arm64/kvm/at.c

217

FIELD_GET(TCR_EL2_TBI, tcr) :

arch/arm64/kvm/at.c

219

FIELD_GET(TCR_TBI1, tcr) :

arch/arm64/kvm/at.c

220

FIELD_GET(TCR_TBI0, tcr)));

arch/arm64/kvm/at.c

226

FIELD_GET(TCR_EL2_SH0_MASK, tcr) :

arch/arm64/kvm/at.c

228

FIELD_GET(TCR_SH1_MASK, tcr) :

arch/arm64/kvm/at.c

229

FIELD_GET(TCR_SH0_MASK, tcr)));

arch/arm64/kvm/at.c

272

FIELD_GET(TCR_EL2_HPD, tcr) :

arch/arm64/kvm/at.c

274

FIELD_GET(TCR_HPD1, tcr) :

arch/arm64/kvm/at.c

275

FIELD_GET(TCR_HPD0, tcr)));

arch/arm64/kvm/at.c

315

(tcr & (va55 ? TCR_EPD1_MASK : TCR_EPD0_MASK)))

arch/arm64/kvm/at.c

320

wi->as_el0 && (tcr & (va55 ? TCR_E0PD1 : TCR_E0PD0)))

arch/arm64/kvm/at.c

324

FIELD_GET(TCR_EL2_PS_MASK, tcr) : FIELD_GET(TCR_IPS_MASK, tcr));

arch/arm64/kvm/at.c

351

FIELD_GET(TCR_EL2_HA, tcr) :

arch/arm64/kvm/at.c

352

FIELD_GET(TCR_HA, tcr));

arch/arm64/kvm/at.c

36

static bool has_52bit_pa(struct kvm_vcpu *vcpu, struct s1_walk_info *wi, u64 tcr)

arch/arm64/kvm/at.c

44

FIELD_GET(TCR_EL2_PS_MASK, tcr) :

arch/arm64/kvm/at.c

45

FIELD_GET(TCR_IPS_MASK, tcr)) == 0b0110);

arch/arm64/kvm/at.c

559

u64 tcr;

arch/arm64/kvm/at.c

56

return (tcr & (wi->regime == TR_EL2 ? TCR_EL2_DS : TCR_DS));

arch/arm64/kvm/at.c

575

config->tcr = read_sysreg_el1(SYS_TCR);

arch/arm64/kvm/at.c

603

write_sysreg_el1(config->tcr, SYS_TCR);

arch/arm64/kvm/hyp/nvhe/tlb.c

144

write_sysreg_el1(cxt->tcr, SYS_TCR);

arch/arm64/kvm/hyp/nvhe/tlb.c

15

u64 tcr;

arch/arm64/kvm/hyp/nvhe/tlb.c

86

val = cxt->tcr = read_sysreg_el1(SYS_TCR);

arch/arm64/kvm/hyp/vhe/tlb.c

16

u64 tcr;

arch/arm64/kvm/hyp/vhe/tlb.c

43

val = cxt->tcr = read_sysreg_el1(SYS_TCR);

arch/arm64/kvm/hyp/vhe/tlb.c

85

write_sysreg_el1(cxt->tcr, SYS_TCR);

arch/arm64/kvm/nested.c

865

u64 tcr;

arch/arm64/kvm/nested.c

870

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/nested.c

871

ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL1 : TTBR0_EL1;

arch/arm64/kvm/nested.c

874

tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/nested.c

875

ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL2 : TTBR0_EL2;

arch/arm64/kvm/nested.c

883

!(tcr & TCR_ASID16))

arch/arm64/kvm/pauth.c

63

u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/pauth.c

73

tbi = tcr & BIT(20);

arch/arm64/kvm/pauth.c

74

tbid = tcr & BIT(29);

arch/arm64/kvm/pauth.c

76

tbi = tcr & TCR_TBI1;

arch/arm64/kvm/pauth.c

77

tbid = tcr & TCR_TBID1;

arch/arm64/kvm/pauth.c

79

tbi = tcr & TCR_TBI0;

arch/arm64/kvm/pauth.c

80

tbid = tcr & TCR_TBID0;

arch/arm64/kvm/pauth.c

90

u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/pauth.c

94

txsz = FIELD_GET(TCR_T0SZ_MASK, tcr);

arch/arm64/kvm/pauth.c

96

txsz = FIELD_GET(TCR_T1SZ_MASK, tcr);

arch/m68k/include/asm/bvme6000hw.h

31

pad_q[3], tcr,

arch/mips/include/asm/txx9tmr.h

15

u32 tcr;

arch/mips/kernel/cevt-txx9.c

100

__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

148

__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

211

__raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

213

__raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

63

__raw_writel(TCR_BASE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

68

__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);

arch/mips/kernel/cevt-txx9.c

83

__raw_writel(TCR_BASE, &tmrptr->tcr);

arch/mips/txx9/generic/setup.c

336

__raw_writel(0, &tmrptr->tcr);

arch/mips/txx9/generic/setup.c

341

&tmrptr->tcr);

arch/powerpc/include/asm/kvm_host.h

647

u32 tcr;

arch/powerpc/include/asm/mpc52xx.h

90

u16 tcr[16]; /* SDMA + 0x1c .. 0x3a */

arch/powerpc/include/asm/reg_booke.h

440

#define TCR_GET_WP(tcr) ((((tcr) & 0xC0000000) >> 30) | \

arch/powerpc/include/asm/reg_booke.h

441

(((tcr) & 0x1E0000) >> 15))

arch/powerpc/include/asm/reg_booke.h

443

#define TCR_GET_WP(tcr) (((tcr) & 0xC0000000) >> 30)

arch/powerpc/include/uapi/asm/kvm.h

212

__u32 tcr;

arch/powerpc/kernel/time.c

705

unsigned int tcr;

arch/powerpc/kernel/time.c

710

tcr = mfspr(SPRN_TCR);

arch/powerpc/kernel/time.c

715

tcr &= TCR_WP_MASK; /* Clear all bits except for TCR[WP] */

arch/powerpc/kernel/time.c

716

tcr |= TCR_DIE; /* Enable decrementer */

arch/powerpc/kernel/time.c

717

mtspr(SPRN_TCR, tcr);

arch/powerpc/kvm/booke.c

1522

sregs->u.e.tcr = vcpu->arch.tcr;

arch/powerpc/kvm/booke.c

1540

kvmppc_set_tcr(vcpu, sregs->u.e.tcr);

arch/powerpc/kvm/booke.c

1708

*val = get_reg_val(id, vcpu->arch.tcr);

arch/powerpc/kvm/booke.c

1781

u32 tcr = set_reg_val(id, *val);

arch/powerpc/kvm/booke.c

1782

kvmppc_set_tcr(vcpu, tcr);

arch/powerpc/kvm/booke.c

1864

vcpu->arch.tcr = new_tcr;

arch/powerpc/kvm/booke.c

1893

if (vcpu->arch.tcr & TCR_ARE) {

arch/powerpc/kvm/booke.c

582

u32 period = TCR_GET_WP(vcpu->arch.tcr);

arch/powerpc/kvm/booke.c

660

if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&

arch/powerpc/kvm/booke.c

679

if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))

arch/powerpc/kvm/booke.c

684

if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))

arch/powerpc/kvm/booke_emulate.c

269

if (vcpu->arch.tcr & TCR_WRC_MASK) {

arch/powerpc/kvm/booke_emulate.c

271

spr_val |= vcpu->arch.tcr & TCR_WRC_MASK;

arch/powerpc/kvm/booke_emulate.c

446

*spr_val = vcpu->arch.tcr;

arch/powerpc/platforms/44x/gpio.c

107

clrbits32(&regs->tcr, GPIO_MASK(gpio));

arch/powerpc/platforms/44x/gpio.c

139

setbits32(&regs->tcr, GPIO_MASK(gpio));

arch/powerpc/platforms/44x/gpio.c

28

__be32 tcr;

arch/powerpc/platforms/52xx/lite5200_pm.c

181

out_be16(&bes->tcr[i], sbes.tcr[i]);

arch/powerpc/platforms/52xx/mpc52xx_pci.c

311

out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);

arch/powerpc/platforms/52xx/mpc52xx_pci.c

82

u32 tcr; /* PCI + 0x6C */

arch/powerpc/sysdev/mpic_timer.c

141

u32 tcr;

arch/powerpc/sysdev/mpic_timer.c

150

tcr = casc_priv->tcr_value |

arch/powerpc/sysdev/mpic_timer.c

152

setbits32(priv->group_tcr, tcr);

arch/powerpc/sysdev/mpic_timer.c

335

u32 tcr;

arch/powerpc/sysdev/mpic_timer.c

336

tcr = casc_priv->tcr_value | (casc_priv->tcr_value <<

arch/powerpc/sysdev/mpic_timer.c

338

clrbits32(priv->group_tcr, tcr);

drivers/atm/idt77252.c

2141

int tcr, tcra;

drivers/atm/idt77252.c

2156

tcr = atm_pcr_goal(&qos->txtp);

drivers/atm/idt77252.c

2157

tcra = tcr >= 0 ? tcr : -tcr;

drivers/atm/idt77252.c

2165

if (tcr > 0) {

drivers/atm/idt77252.c

2168

} else if (tcr == 0) {

drivers/atm/idt77252.c

2211

int tcr;

drivers/atm/idt77252.c

2224

tcr = atm_pcr_goal(&qos->txtp);

drivers/atm/idt77252.c

2225

if (tcr == 0)

drivers/atm/idt77252.c

2226

tcr = card->link_pcr;

drivers/atm/idt77252.c

2228

vc->estimator = idt77252_init_est(vc, tcr);

drivers/atm/idt77252.c

2231

vc->init_er = idt77252_rate_logindex(card, tcr);

drivers/atm/idt77252.c

2233

if (tcr < 0)

drivers/atm/nicstar.c

1232

int tcr, tcra; /* target cell rate, and absolute value */

drivers/atm/nicstar.c

1287

tcr = atm_pcr_goal(&(vcc->qos.txtp));

drivers/atm/nicstar.c

1288

tcra = tcr >= 0 ? tcr : -tcr;

drivers/atm/nicstar.c

1299

if (tcr > 0) {

drivers/atm/nicstar.c

1302

} else if (tcr == 0) {

drivers/clocksource/timer-davinci.c

104

unsigned int tcr;

drivers/clocksource/timer-davinci.c

106

tcr = DAVINCI_TIMER_ENAMODE_ONESHOT <<

drivers/clocksource/timer-davinci.c

109

tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC <<

drivers/clocksource/timer-davinci.c

112

writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);

drivers/clocksource/timer-davinci.c

198

int tcr;

drivers/clocksource/timer-davinci.c

200

tcr = DAVINCI_TIMER_ENAMODE_PERIODIC <<

drivers/clocksource/timer-davinci.c

202

tcr |= DAVINCI_TIMER_ENAMODE_ONESHOT <<

drivers/clocksource/timer-davinci.c

207

writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);

drivers/clocksource/timer-davinci.c

217

unsigned int tcr;

drivers/clocksource/timer-davinci.c

219

tcr = DAVINCI_TIMER_ENAMODE_PERIODIC <<

drivers/clocksource/timer-davinci.c

224

writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);

drivers/clocksource/timer-davinci.c

87

unsigned int tcr;

drivers/clocksource/timer-davinci.c

89

tcr = DAVINCI_TIMER_ENAMODE_DISABLED <<

drivers/clocksource/timer-davinci.c

96

tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC <<

drivers/clocksource/timer-davinci.c

99

writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);

drivers/clocksource/timer-keystone.c

102

keystone_timer_writel(tcr, TCR);

drivers/clocksource/timer-keystone.c

108

u32 tcr;

drivers/clocksource/timer-keystone.c

110

tcr = keystone_timer_readl(TCR);

drivers/clocksource/timer-keystone.c

113

tcr &= ~(TCR_ENAMODE_MASK);

drivers/clocksource/timer-keystone.c

114

keystone_timer_writel(tcr, TCR);

drivers/clocksource/timer-keystone.c

76

u32 tcr;

drivers/clocksource/timer-keystone.c

79

tcr = keystone_timer_readl(TCR);

drivers/clocksource/timer-keystone.c

80

off = tcr & ~(TCR_ENAMODE_MASK);

drivers/clocksource/timer-keystone.c

83

tcr |= mask;

drivers/dma/bestcomm/ata.c

80

offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);

drivers/dma/bestcomm/bestcomm.c

313

out_be16(&bcom_eng->regs->tcr[task], 0);

drivers/dma/bestcomm/bestcomm.c

347

out_be16(&bcom_eng->regs->tcr[task], 0);

drivers/dma/bestcomm/fec.c

124

offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);

drivers/dma/bestcomm/fec.c

225

offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);

drivers/dma/bestcomm/gen_bd.c

131

offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);

drivers/dma/bestcomm/gen_bd.c

215

offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);

drivers/dma/sh/rcar-dmac.c

51

u32 tcr;

drivers/dma/sh/rcar-dmac.c

774

hwdesc->tcr = chunk->size >> desc->xfer_shift;

drivers/dma/sh/shdma.h

47

u32 tcr; /* TCR / transfer count */

drivers/dma/sh/shdmac.c

218

sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);

drivers/dma/sh/shdmac.c

290

sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar);

drivers/dma/sh/shdmac.c

397

sh_desc->hw.tcr = *len;

drivers/dma/sh/shdmac.c

430

return sh_desc->hw.tcr -

drivers/dma/sh/shdmac.c

472

(sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) ||

drivers/dma/sh/shdmac.c

474

(sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf);

drivers/i2c/busses/i2c-viai2c-common.c

24

u16 val, tcr_val = i2c->tcr;

drivers/i2c/busses/i2c-viai2c-common.c

66

u16 val, tcr_val = i2c->tcr;

drivers/i2c/busses/i2c-viai2c-common.h

69

u16 tcr;

drivers/i2c/busses/i2c-viai2c-wmt.c

127

i2c->tcr = VIAI2C_TCR_FAST;

drivers/i2c/busses/i2c-viai2c-wmt.c

64

if (i2c->tcr == VIAI2C_TCR_FAST)

drivers/i2c/busses/i2c-viai2c-zhaoxin.c

251

i2c->tcr = params[1];

drivers/i2c/busses/i2c-viai2c-zhaoxin.c

83

u16 tcr_val = i2c->tcr;

drivers/iommu/apple-dart.c

1237

.tcr = DART_T8020_TCR,

drivers/iommu/apple-dart.c

1263

.tcr = DART_T8020_TCR,

drivers/iommu/apple-dart.c

1289

.tcr = DART_T8020_TCR,

drivers/iommu/apple-dart.c

1314

.tcr = DART_T8110_TCR,

drivers/iommu/apple-dart.c

148

#define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))

drivers/iommu/apple-dart.c

179

u32 tcr;

drivers/iommu/apple-dart.c

316

u32 tcr = dart->hw->tcr_enabled;

drivers/iommu/apple-dart.c

320

tcr |= dart->hw->tcr_4level;

drivers/iommu/apple-dart.c

325

writel(tcr, dart->regs + DART_TCR(dart, sid));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

507

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.ips = 1;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

508

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.tg = 2;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

509

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.sh = 3;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

510

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.orgn = 1;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

511

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.irgn = 2;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

512

io_pgtable.cfg.arm_lpae_s1_cfg.tcr.tsz = 4;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1441

typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr =

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1442

&pgtbl_cfg->arm_lpae_s1_cfg.tcr;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1447

FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1448

FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1449

FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1450

FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1451

FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1457

FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) |

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

264

if (cb->tcr[0] & ARM_SMMU_TCR_EPD1)

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

270

if ((cb->tcr[0] & ARM_SMMU_TCR_EPD0))

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

274

cb->tcr[0] = arm_smmu_lpae_tcr(&pgtable->cfg);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

277

u32 tcr = cb->tcr[0];

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

280

if (!(cb->tcr[0] & ARM_SMMU_TCR_EPD0))

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

283

tcr |= arm_smmu_lpae_tcr(pgtbl_cfg);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

284

tcr &= ~(ARM_SMMU_TCR_EPD0 | ARM_SMMU_TCR_EPD1);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

286

cb->tcr[0] = tcr;

drivers/iommu/arm/arm-smmu/arm-smmu.c

531

cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr;

drivers/iommu/arm/arm-smmu/arm-smmu.c

533

cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg);

drivers/iommu/arm/arm-smmu/arm-smmu.c

534

cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg);

drivers/iommu/arm/arm-smmu/arm-smmu.c

536

cb->tcr[1] |= ARM_SMMU_TCR2_AS;

drivers/iommu/arm/arm-smmu/arm-smmu.c

538

cb->tcr[0] |= ARM_SMMU_TCR_EAE;

drivers/iommu/arm/arm-smmu/arm-smmu.c

541

cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg);

drivers/iommu/arm/arm-smmu/arm-smmu.c

630

arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR2, cb->tcr[1]);

drivers/iommu/arm/arm-smmu/arm-smmu.c

631

arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR, cb->tcr[0]);

drivers/iommu/arm/arm-smmu/arm-smmu.h

367

u32 tcr[2];

drivers/iommu/arm/arm-smmu/arm-smmu.h

397

u32 tcr = FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

398

FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

399

FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

400

FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

401

FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz);

drivers/iommu/arm/arm-smmu/arm-smmu.h

408

tcr = (tcr << 16) & ~ARM_SMMU_TCR_A1;

drivers/iommu/arm/arm-smmu/arm-smmu.h

409

tcr |= ARM_SMMU_TCR_EPD0;

drivers/iommu/arm/arm-smmu/arm-smmu.h

411

tcr |= ARM_SMMU_TCR_EPD1;

drivers/iommu/arm/arm-smmu/arm-smmu.h

413

return tcr;

drivers/iommu/arm/arm-smmu/arm-smmu.h

418

return FIELD_PREP(ARM_SMMU_TCR2_PASIZE, cfg->arm_lpae_s1_cfg.tcr.ips) |

drivers/iommu/io-pgtable-arm-v7s.c

729

cfg->arm_v7s_cfg.tcr = 0;

drivers/iommu/io-pgtable-arm.c

1002

tcr->tg = tg1 ? ARM_LPAE_TCR_TG1_64K : ARM_LPAE_TCR_TG0_64K;

drivers/iommu/io-pgtable-arm.c

1008

tcr->ips = ARM_LPAE_TCR_PS_32_BIT;

drivers/iommu/io-pgtable-arm.c

1011

tcr->ips = ARM_LPAE_TCR_PS_36_BIT;

drivers/iommu/io-pgtable-arm.c

1014

tcr->ips = ARM_LPAE_TCR_PS_40_BIT;

drivers/iommu/io-pgtable-arm.c

1017

tcr->ips = ARM_LPAE_TCR_PS_42_BIT;

drivers/iommu/io-pgtable-arm.c

1020

tcr->ips = ARM_LPAE_TCR_PS_44_BIT;

drivers/iommu/io-pgtable-arm.c

1023

tcr->ips = ARM_LPAE_TCR_PS_48_BIT;

drivers/iommu/io-pgtable-arm.c

1026

tcr->ips = ARM_LPAE_TCR_PS_52_BIT;

drivers/iommu/io-pgtable-arm.c

1032

tcr->tsz = 64ULL - cfg->ias;

drivers/iommu/io-pgtable-arm.c

963

typeof(&cfg->arm_lpae_s1_cfg.tcr) tcr = &cfg->arm_lpae_s1_cfg.tcr;

drivers/iommu/io-pgtable-arm.c

979

tcr->sh = ARM_LPAE_TCR_SH_IS;

drivers/iommu/io-pgtable-arm.c

980

tcr->irgn = ARM_LPAE_TCR_RGN_WBWA;

drivers/iommu/io-pgtable-arm.c

981

tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;

drivers/iommu/io-pgtable-arm.c

985

tcr->sh = ARM_LPAE_TCR_SH_OS;

drivers/iommu/io-pgtable-arm.c

986

tcr->irgn = ARM_LPAE_TCR_RGN_NC;

drivers/iommu/io-pgtable-arm.c

988

tcr->orgn = ARM_LPAE_TCR_RGN_NC;

drivers/iommu/io-pgtable-arm.c

990

tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;

drivers/iommu/io-pgtable-arm.c

996

tcr->tg = tg1 ? ARM_LPAE_TCR_TG1_4K : ARM_LPAE_TCR_TG0_4K;

drivers/iommu/io-pgtable-arm.c

999

tcr->tg = tg1 ? ARM_LPAE_TCR_TG1_16K : ARM_LPAE_TCR_TG0_16K;

drivers/iommu/msm_iommu.c

273

SET_TTBCR(base, ctx, priv->cfg.arm_v7s_cfg.tcr);

drivers/net/can/flexcan/flexcan-core.c

222

u32 tcr; /* 0x0c */

drivers/net/can/rcar/rcar_can.c

85

u8 tcr; /* Test Control Register */

drivers/net/ethernet/natsemi/sonic.c

454

u16 tcr = SONIC_READ(SONIC_TCR);

drivers/net/ethernet/natsemi/sonic.c

457

__func__, tcr);

drivers/net/ethernet/natsemi/sonic.c

459

if (tcr & (SONIC_TCR_EXD | SONIC_TCR_EXC |

drivers/net/usb/rtl8150.c

626

u8 cr, tcr, rcr, msr;

drivers/net/usb/rtl8150.c

633

tcr = 0xd8;

drivers/net/usb/rtl8150.c

638

set_registers(dev, TCR, 1, &tcr);

drivers/spi/spi-stm32-ospi.c

468

u32 ccr, cr, dcr2, tcr;

drivers/spi/spi-stm32-ospi.c

500

tcr = TCR_SSHIFT;

drivers/spi/spi-stm32-ospi.c

502

tcr |= FIELD_PREP(TCR_DCYC_MASK,

drivers/spi/spi-stm32-ospi.c

505

writel_relaxed(tcr, regs_base + OSPI_TCR);

drivers/tty/serial/8250/8250_dwlib.c

183

u32 tcr;

drivers/tty/serial/8250/8250_dwlib.c

185

tcr = dw8250_readl_ext(p, DW_UART_TCR);

drivers/tty/serial/8250/8250_dwlib.c

186

tcr &= ~DW_UART_TCR_XFER_MODE;

drivers/tty/serial/8250/8250_dwlib.c

189

tcr |= DW_UART_TCR_RS485_EN;

drivers/tty/serial/8250/8250_dwlib.c

192

tcr |= DW_UART_TCR_XFER_MODE_DE_DURING_RE;

drivers/tty/serial/8250/8250_dwlib.c

194

tcr |= DW_UART_TCR_XFER_MODE_DE_OR_RE;

drivers/tty/serial/8250/8250_dwlib.c

201

tcr &= ~DW_UART_TCR_RS485_EN;

drivers/tty/serial/8250/8250_dwlib.c

205

tcr |= DW_UART_TCR_DE_POL;

drivers/tty/serial/8250/8250_dwlib.c

206

tcr &= ~DW_UART_TCR_RE_POL;

drivers/tty/serial/8250/8250_dwlib.c

209

tcr &= ~DW_UART_TCR_DE_POL;

drivers/tty/serial/8250/8250_dwlib.c

211

tcr |= DW_UART_TCR_RE_POL;

drivers/tty/serial/8250/8250_dwlib.c

213

dw8250_writel_ext(p, DW_UART_TCR, tcr);

drivers/tty/serial/8250/8250_pci.c

1210

u8 tcr;

drivers/tty/serial/8250/8250_pci.c

1230

tcr = tc;

drivers/tty/serial/8250/8250_pci.c

1236

tcr = tc;

drivers/tty/serial/8250/8250_pci.c

1241

while (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1 &&

drivers/tty/serial/8250/8250_pci.c

1244

tcr <<= 1;

drivers/tty/serial/8250/8250_pci.c

1247

if (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1) {

drivers/tty/serial/8250/8250_pci.c

1249

tcr <<= 1;

drivers/tty/serial/8250/8250_pci.c

1259

*frac = (cpr << 8) | (tcr & OXSEMI_TORNADO_TCR_MASK);

drivers/tty/serial/8250/8250_pci.c

1279

u8 tcr = quot_frac;

drivers/tty/serial/8250/8250_pci.c

1281

serial_icr_write(up, UART_TCR, tcr);

drivers/tty/serial/dz.c

810

unsigned short csr, tcr, trdy, mask;

drivers/tty/serial/dz.c

816

tcr = dz_in(dport, DZ_TCR);

drivers/tty/serial/dz.c

817

tcr |= 1 << dport->port.line;

drivers/tty/serial/dz.c

818

mask = tcr;

drivers/tty/serial/dz.c

839

dz_out(dport, DZ_TCR, tcr);

drivers/tty/serial/sunsab.h

18

u8 tcr; /* Termination Character Register */

drivers/tty/serial/sunsab.h

49

u8 tcr;

drivers/tty/serial/sunsab.h

85

u8 tcr;

drivers/tty/synclink_gt.c

4369

unsigned short tcr;

drivers/tty/synclink_gt.c

4374

tcr = rd_reg16(info, TCR);

drivers/tty/synclink_gt.c

4377

tcr = (tcr & ~(BIT6 + BIT5)) | BIT4;

drivers/tty/synclink_gt.c

4380

} else if (!(tcr & BIT6)) {

drivers/tty/synclink_gt.c

4382

tcr &= ~(BIT5 + BIT4);

drivers/tty/synclink_gt.c

4384

wr_reg16(info, TCR, tcr);

drivers/watchdog/txx9wdt.c

58

&txx9wdt_reg->tcr);

drivers/watchdog/txx9wdt.c

68

__raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,

drivers/watchdog/txx9wdt.c

69

&txx9wdt_reg->tcr);

include/linux/fsl/bestcomm/bestcomm_priv.h

264

reg = in_be16(&bcom_eng->regs->tcr[task]);

include/linux/fsl/bestcomm/bestcomm_priv.h

265

out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE);

include/linux/fsl/bestcomm/bestcomm_priv.h

271

u16 reg = in_be16(&bcom_eng->regs->tcr[task]);

include/linux/fsl/bestcomm/bestcomm_priv.h

272

out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE);

include/linux/fsl/bestcomm/bestcomm_priv.h

337

u16 __iomem *tcr = &bcom_eng->regs->tcr[task];

include/linux/fsl/bestcomm/bestcomm_priv.h

338

out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task);

include/linux/fsl/bestcomm/bestcomm_priv.h

344

u16 __iomem *tcr = &bcom_eng->regs->tcr[task];

include/linux/fsl/bestcomm/bestcomm_priv.h

345

out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8));

include/linux/io-pgtable.h

150

} tcr;

include/linux/io-pgtable.h

169

u32 tcr;

tools/arch/powerpc/include/uapi/asm/kvm.h

212

__u32 tcr;

tools/testing/selftests/kvm/arm64/page_fault_test.c

195

uint64_t hadbs, tcr;

tools/testing/selftests/kvm/arm64/page_fault_test.c

202

tcr = read_sysreg(tcr_el1) | TCR_HA;

tools/testing/selftests/kvm/arm64/page_fault_test.c

203

write_sysreg(tcr, tcr_el1);