str_enabled_disabled
bus->number, str_enabled_disabled(features & PCI_COMMAND_FAST_BACK));
str_enabled_disabled(power_ctrl & L310_DYNAMIC_CLK_GATING_EN),
str_enabled_disabled(power_ctrl & L310_STNDBY_MODE_EN));
str_enabled_disabled(gicv4_enable));
str_enabled_disabled(l1parity));
str_enabled_disabled(errctl & ERRCTL_PE));
str_enabled_disabled(errctl & ERRCTL_L2P));
str_enabled_disabled(read_c0_errctl() & 0x80000000));
pr_info("Secure boot mode %s\n", str_enabled_disabled(enabled));
pr_info("Trusted boot mode %s\n", str_enabled_disabled(enabled));
*l2cr, str_enabled_disabled((*l2cr) & 0x80000000));
str_enabled_disabled(flags & HT_MSI_FLAGS_ENABLE), addr);
str_enabled_disabled(sun4v_cookie_only_virqs()));
str_enabled_disabled(
str_enabled_disabled(mtrr_state.enabled & MTRR_STATE_MTRR_ENABLED));
pr_info("Nested Paging %s\n", str_enabled_disabled(npt_enabled));
str_enabled_disabled(uv_pch_intr_now_enabled));
pr_info("fips mode: %s\n", str_enabled_disabled(fips_enabled));
str_enabled_disabled(p->flags & ACPI_SRAT_CPU_ENABLED));
str_enabled_disabled(p->flags & ACPI_SRAT_MEM_ENABLED),
str_enabled_disabled(p->flags & ACPI_SRAT_CPU_ENABLED));
str_enabled_disabled(p->flags & ACPI_SRAT_GICC_ENABLED));
str_enabled_disabled(p->flags & ACPI_SRAT_GENERIC_AFFINITY_ENABLED));
str_enabled_disabled(p->flags & ACPI_SRAT_GENERIC_AFFINITY_ENABLED));
str_enabled_disabled(p->flags & ACPI_SRAT_RINTC_ENABLED));
str_enabled_disabled(device_may_wakeup(&dev->dev)));
str_enabled_disabled(device_may_wakeup(ldev) ||
str_enabled_disabled(p->lapic_flags & ACPI_MADT_ENABLED));
str_enabled_disabled(p->flags & ACPI_MADT_ENABLED));
str_enabled_disabled(p->flags & ACPI_MADT_ENABLED));
str_enabled_disabled(p->flags & ACPI_MADT_ENABLED));
str_enabled_disabled(p->lapic_flags & ACPI_MADT_ENABLED));
str_enabled_disabled(p->lapic_flags & ACPI_MADT_ENABLED));
str_enabled_disabled(version->secure_boot));
str_enabled_disabled(version->otp_lock));
str_enabled_disabled(version->api_lock));
str_enabled_disabled(version->debug_lock));
str_enabled_disabled(params->secure_boot));
str_enabled_disabled(params->otp_lock));
str_enabled_disabled(params->api_lock));
str_enabled_disabled(params->debug_lock));
seq_printf(s, "| %-13s |", str_enabled_disabled(d_dbg_entry.dev_cid_filt_en));
seq_printf(s, "| %-14s |", str_enabled_disabled(d_dbg_entry.dev_sem_en));
str_enabled_disabled(sr_dbg_entry.sr_enable));
str_enabled_disabled(val & SRC_XTALCR_MXTALSTAT));
str_enabled_disabled(data & pclk->param.reg_clk_mask));
cpumask_pr_args(policy->cpus), str_enabled_disabled(val));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(hw_prefcore));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(dynamic_epp));
__func__, str_enabled_disabled(enable));
str_enabled_disabled(powernv_pstate_info.wof_enabled));
str_enabled_disabled(grp->is_enabled));
str_enabled_disabled(cxld->flags & CXL_DECODER_F_ENABLE),
str_enabled_disabled(chan->has_sg));
str_enabled_disabled(zl3073x_out_is_enabled(out)),
str_enabled_disabled(zl3073x_ref_is_enabled(ref)),
str_enabled_disabled(dclr & BIT(8)));
str_enabled_disabled(dct_data_intlv_enabled(pvt)),
str_enabled_disabled(dct_interleave_enabled(pvt)),
cpu, reg->q, str_enabled_disabled(nbe));
edac_dbg(3, "Node %d: DRAM ECC %s.\n", nid, str_enabled_disabled(ecc_en));
edac_dbg(3, "Node %d: DRAM ECC %s.\n", pvt->mc_node_id, str_enabled_disabled(ecc_en));
str_enabled_disabled(MTR_DIMMS_ETHROTTLE(mtr)));
str_enabled_disabled(MTR_DIMMS_ETHROTTLE(mtr)));
str_enabled_disabled(IS_ECC_ENABLED(pvt->mc_settings)));
str_enabled_disabled(IS_RETRY_ENABLED(pvt->mc_settings)));
str_enabled_disabled(atomic_read(&adev->throttling_logging_enabled)),
return sysfs_emit(buf, "%s\n", str_enabled_disabled(npower));
str_enabled_disabled(enable),
str_enabled_disabled(was_enabled));
seq_printf(m, "LOBF status: %s\n", str_enabled_disabled(alpm_ctl & ALPM_CTL_LOBF_ENABLE));
str_enabled_disabled(!(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE)));
str_enabled_disabled(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE));
str_enabled_disabled(panel->backlight.enabled),
str_enabled_disabled(cmtg_config->cmtg_a_enable),
intel_cmtg_has_cmtg_b(display) ? str_enabled_disabled(cmtg_config->cmtg_b_enable) : "n/a",
str_enabled_disabled(pipe_config->splitter.enable),
str_enabled_disabled(pipe_config->fec_enable),
str_enabled_disabled(pipe_config->enhanced_framing));
str_enabled_disabled(pipe_config->sdp_split_enable));
str_enabled_disabled(pipe_config->has_psr &&
str_enabled_disabled(pipe_config->has_sel_update),
str_enabled_disabled(pipe_config->has_panel_replay),
str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
str_enabled_disabled(pipe_config->pch_pfit.enabled),
str_enabled_disabled(cx0pll_state->ssc_enabled),
str_enabled_disabled(intel_c10pll_ssc_enabled(pll_state)));
str_enabled_disabled(enable));
str_enabled_disabled(enabled), ret, status);
str_enabled_disabled(enabled));
str_enabled_disabled(bios_lvds_use_ssc),
str_enabled_disabled(display->vbt.lvds_use_ssc));
seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
str_enabled_disabled(!power_domains->init_wakeref));
transcoder_name(cpu_transcoder), str_enabled_disabled(enable));
transcoder_name(cpu_transcoder), str_enabled_disabled(enable));
drm_printf(&p, "LP clock during LPM %s\n", str_enabled_disabled(intel_dsi->lp_clock_during_lpm));
drm_printf(&p, "Blanking packets during BLLP %s\n", str_enabled_disabled(intel_dsi->blanking_pkt));
drm_printf(&p, "EoT packet %s\n", str_enabled_disabled(intel_dsi->eot_pkt));
drm_printf(&p, "Clock stop during BLLP %s\n", str_enabled_disabled(intel_dsi->clock_stop));
str_enabled_disabled(!(intel_dsi->video_frmt_cfg_bits & DISABLE_VIDEO_BTA)));
str_enabled_disabled(visible), pipe_name(pipe));
str_enabled_disabled(crtc_state->hw.active));
str_enabled_disabled(encoder->base.crtc),
str_enabled_disabled(connector->base.encoder));
str_enabled_disabled(enabled), val);
str_enabled_disabled(psr->psr2_sel_fetch_enabled));
str_enabled_disabled(enabled),
str_enabled_disabled(display->params.enable_sagv));
drm_printf(p, "IRQ: %s\n", str_enabled_disabled(b->irq_armed));
str_enabled_disabled(!atomic_read(&engine->sched_engine->tasklet.count)),
drm_printf(p, "CT %s\n", str_enabled_disabled(ct->enabled));
log->level, str_enabled_disabled(log->level),
guc_info(guc, "RC %s\n", str_enabled_disabled(enable));
guc_info(guc, "submission %s\n", str_enabled_disabled(intel_uc_uses_guc_submission(uc)));
guc_info(guc, "SLPC %s\n", str_enabled_disabled(intel_uc_uses_guc_slpc(uc)));
str_enabled_disabled(i915_vtd_active(i915)));
str_enabled_disabled(true),
str_enabled_disabled(false));
str_enabled_disabled(value), ERR_PTR(err));
str_enabled_disabled(value));
str_enabled_disabled(value), ERR_PTR(err));
str_enabled_disabled(policy->sched_if_idle));
str_enabled_disabled(policy->reset_engine));
xe_gt_sriov_dbg(gt, "sched groups %s\n", str_enabled_disabled(value));
str_enabled_disabled(state == XE_GUC_CT_STATE_ENABLED));
return sysfs_emit(buff, "%s\n", str_enabled_disabled(survivability->fdo_mode));
str_enabled_disabled(gb_svc_watchdog_enabled(svc)));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(mp2->dev_en.is_hpd_enabled));
dev_dbg(dev, "EC is %s\n", str_enabled_disabled(err));
dev_info(dev, "EC %s\n", str_enabled_disabled(enable));
str_enabled_disabled(enable->integer.value));
return sprintf(buf, "%s\n", str_enabled_disabled(
str_enabled_disabled(value));
str_enabled_disabled(this->swap_block_mark));
str_enabled_disabled(!can_dev_in_xl_only_mode(priv)));
str_enabled_disabled(PSIPMMR_SI_MAC_UP(i) & val));
str_enabled_disabled(PSIPMMR_SI_MAC_MP(i) & val));
output, str_enabled_disabled(ena));
new_cfg ? "New" : "Current", str_enabled_disabled(enable),
str_enabled_disabled(on));
str_enabled_disabled(val_txdly));
str_enabled_disabled(val_rxdly));
str_enabled_disabled(wow_enable));
ep93xx_padgroups[i], str_enabled_disabled(enabled));
str_enabled_disabled(enabled));
str_enabled_disabled(enabled));
str_enabled_disabled(enabled));
str_enabled_disabled(enabled));
str_enabled_disabled(val & BIT(i)));
dev_info(d->dev, "wake %s for irq %d\n", str_enabled_disabled(on),
pr_info("wake %s for irq %u (%s-%lu)\n", str_enabled_disabled(on),
str_enabled_disabled(r->data == 1));
seq_printf(m, "status:\t\t%s\n", str_enabled_disabled(status == TPACPI_RFK_RADIO_ON));
pr_info("radio switch found; radios are %s\n", str_enabled_disabled(status & BIT(0)));
seq_printf(m, "status:\t\t%s\n", str_enabled_disabled(status & BIT(0)));
seq_printf(m, "lcd:\t\t%s\n", str_enabled_disabled(status & BIT(0)));
seq_printf(m, "crt:\t\t%s\n", str_enabled_disabled(status & BIT(1)));
seq_printf(m, "dvi:\t\t%s\n", str_enabled_disabled(status & BIT(3)));
seq_printf(m, "auto:\t\t%s\n", str_enabled_disabled(autosw & BIT(0)));
str_enabled_disabled(status), status);
seq_printf(m, "status:\t\t%s\n", str_enabled_disabled(status));
dev_dbg(dev, "HD audio power %s\n", str_enabled_disabled(byte));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(state));
str_enabled_disabled(client->flags & I2C_CLIENT_PEC));
str_enabled_disabled(mode));
str_enabled_disabled(ringacc->dma_ring_reset_quirk));
str_enabled_disabled(flags & MEDIA_LNK_FL_ENABLED));
str_enabled_disabled(flags & MEDIA_LNK_FL_ENABLED));
str_enabled_disabled(tz->mode == THERMAL_DEVICE_ENABLED));
str_enabled_disabled(active));
str_enabled_disabled(port_ok));
tb_port_dbg(port, "lane %s\n", str_enabled_disabled(enable));
str_enabled_disabled(enable));
dev_dbg(&xd->dev, "lane bonding %s\n", str_enabled_disabled(width == 2));
nr_uarts, str_enabled_disabled(share_irqs));
str_enabled_disabled(regulator_is_enabled(info->vbus)));
str_enabled_disabled(is_set));
str_enabled_disabled(csr & (1 << 15)),
max, str_enabled_disabled(ep->stream_en));
str_enabled_disabled(par->FPDither));
fbname, str_enabled_disabled(enable));
#define str_disabled_enabled(v) str_enabled_disabled(!(v))
str_enabled_disabled(audit_default));
return sysfs_emit(buf, "%s\n", str_enabled_disabled(irqd_is_wakeup_set(&desc->irq_data)));
str_enabled_disabled(state));
panic_on_taint, str_enabled_disabled(panic_on_taint_nousertaint));
str_enabled_disabled(enable_llc));
str_enabled_disabled(enable_numa));
str_enabled_disabled((long)rec->oper.ioctl),
str_enabled_disabled((long)rec->oper.load_patch));
str_enabled_disabled(p->q_enabled));
str_enabled_disabled(reg & AD_DS_WSMC_WAEN));
str_enabled_disabled(reg & AD_DS_WSMC_SYEN));
str_enabled_disabled(reg & AD_DS_RAMC_ADEN));
str_enabled_disabled(reg & AD_DS_RAMC_REEN));
str_enabled_disabled(i2s->has_capture),
str_enabled_disabled(i2s->has_playback));
str_enabled_disabled(pdata->non_overlap_enable));
str_enabled_disabled(already_enabled));
str_enabled_disabled(already_enabled));
str_enabled_disabled(already_enabled));
str_enabled_disabled(already_enabled));
dev_vdbg(component->dev, "Class W %s\n", str_enabled_disabled(enable));
elid, str_enabled_disabled(state));
str_enabled_disabled(ready->flags & SOF_IPC_INFO_GDB),
str_enabled_disabled(ready->flags & SOF_IPC_INFO_LOCKS),
str_enabled_disabled(ready->flags & SOF_IPC_INFO_LOCKSV));