sign_extend64
sign_extend64(__val, id##_##fld##_WIDTH - 1); \
sign_extend64(__val, id##_##fld##_WIDTH - 1); \
((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
val = sign_extend64(val, 31);
val = sign_extend64(val, 31);
imm = sign_extend64(imm, 20);
if (!tbi && (u64)sign_extend64(va, 55) != va)
va = (u64)sign_extend64(va, 55);
s64 sfld = sign_extend64(regfld, map->width - 1);
s64 slim = sign_extend64(map->lo_lim, map->width - 1);
#define tlbi_va_s1_to_va(v) (u64)sign_extend64((v) << 12, 48)
return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 48);
uint64_t new_raw_count = sign_extend64(
(sign_extend64(((addr & ADDR_IMMMASK_##INSN) >> ADDR_IMMSHIFT_##INSN), ADDR_IMMSBIDX_##INSN))
jump_addr = cur_pc + sign_extend64(si << 2, 17);
jump_addr = cur_pc + sign_extend64((si_h << 16 | si_l) << 2, 27);
jump_addr = cur_pc + sign_extend64((si_h << 16 | si_l) << 2, 22);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
regs->csr_era = regs->regs[rj] + sign_extend64(imm << 2, 17);
regs->regs[rd] = pc + sign_extend64(imm << 2, 21);
regs->regs[rd] = pc + sign_extend64(imm << 12, 31);
regs->regs[rd] = pc + sign_extend64(imm << 18, 37);
regs->regs[rd] = pc + sign_extend64(imm << 12, 31);
regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 27);
regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 27);
regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 22);
regs->csr_era = pc + sign_extend64((imm_h << 16 | imm_l) << 2, 22);
regs->csr_era = pc + sign_extend64(imm << 2, 17);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 27);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 27);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 22);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 22);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 22);
*next_addr = pc + sign_extend64((si_h << 16 | si_l) << 2, 22);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = pc + sign_extend64(si << 2, 17);
*next_addr = regs->regs[rj] + sign_extend64(si << 2, 17);
disp1 = sign_extend64(((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16) +
delta = sign_extend64(delta, 31);
off = (gva_t)sign_extend64(off, 31);
off = (gva_t)sign_extend64(off, 15);
return (sign_extend64(gva, lam_bit) & ~BIT_ULL(63)) | (gva & BIT_ULL(63));
chan->df_offset = sign_extend64(val, 47);
phase_offset = div_s64(sign_extend64(phase_offset, 47), 100);
phase_comp = sign_extend64(ref->phase_comp, 31);
phase_comp = sign_extend64(ref->phase_comp, 47);
return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT);
return sign_extend64(address, xe->info.va_bits - 1);
*val = sign_extend64(__val, (8 * size) - 1);
reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47);
*phase_offset = sign_extend64(*phase_offset, 47);
phase_offset = sign_extend64(phase_offset, 47);
data64 = sign_extend64(data, 15) * MAX17042_CAPACITY_LSB;
data64 = sign_extend64(data, 15) * MAX17042_CURRENT_LSB;
data64 = sign_extend64(data, 15) * MAX17042_CURRENT_LSB;
now = sign_extend64(ctr + off, RTC_BITS - 1) >> RTC_SEC_SHIFT;
err_code = sign_extend64(retval, 31);
insn->immediate = sign_extend64(inst.reg1i21_format.immediate_h << 16 |
insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
insn->immediate = sign_extend64(inst.reg2i14_format.immediate, 13);
insn->immediate = sign_extend64(inst.reg2i14_format.immediate, 13);
insn->immediate = sign_extend64(inst.reg2i16_format.immediate, 15);
insn->immediate = sign_extend64(inst.reg2i16_format.immediate, 15);
insn->immediate = sign_extend64(inst.reg0i26_format.immediate_h << 16 |
insn->immediate = sign_extend64(inst.reg0i26_format.immediate_h << 16 |