arch/mips/cavium-octeon/executive/cvmx-spi.c

367

gmxx_tx_spi_max.s.slice = 0;

arch/mips/include/asm/octeon/cvmx-gmxx-defs.h

2196

uint64_t slice:7;

arch/mips/include/asm/octeon/cvmx-gmxx-defs.h

2202

uint64_t slice:7;

arch/mips/include/asm/sn/addrs.h

278

#define EX_HANDLER_OFFSET(slice) ((slice) << 16)

arch/mips/include/asm/sn/addrs.h

279

#define EX_HANDLER_ADDR(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

280

PHYS_TO_K0(NODE_OFFSET(nasid) | EX_HANDLER_OFFSET(slice))

arch/mips/include/asm/sn/addrs.h

283

#define EX_FRAME_OFFSET(slice) ((slice) << 16 | 0x400)

arch/mips/include/asm/sn/addrs.h

284

#define EX_FRAME_ADDR(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

285

PHYS_TO_K0(NODE_OFFSET(nasid) | EX_FRAME_OFFSET(slice))

arch/mips/include/asm/sn/addrs.h

332

#define LAUNCH_OFFSET(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

334

KLD_LAUNCH(nasid)->stride * (slice))

arch/mips/include/asm/sn/addrs.h

335

#define LAUNCH_ADDR(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

336

TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))

arch/mips/include/asm/sn/addrs.h

339

#define SN_NMI_OFFSET(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

341

KLD_NMI(nasid)->stride * (slice))

arch/mips/include/asm/sn/addrs.h

342

#define NMI_ADDR(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

343

TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice))

arch/mips/include/asm/sn/addrs.h

354

#define SYMMON_STK_OFFSET(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

356

KLD_SYMMON_STK(nasid)->stride * (slice))

arch/mips/include/asm/sn/addrs.h

359

#define SYMMON_STK_ADDR(nasid, slice) \

arch/mips/include/asm/sn/addrs.h

360

TO_NODE_CAC((nasid), SYMMON_STK_OFFSET(nasid, slice))

arch/mips/include/asm/sn/sn0/addrs.h

143

#define KERN_NMI_ADDR(nasid, slice) \

arch/mips/include/asm/sn/sn0/addrs.h

145

(IP27_NMI_KREGS_CPU_SIZE * (slice)))

arch/mips/sgi-ip27/ip27-common.h

11

extern void install_cpu_nmi_handler(int slice);

arch/mips/sgi-ip27/ip27-irq.c

256

int slice = LOCAL_HUB_L(PI_CPU_NUM);

arch/mips/sgi-ip27/ip27-irq.c

259

resched = CPU_RESCHED_A_IRQ + slice;

arch/mips/sgi-ip27/ip27-irq.c

263

call = CPU_CALL_A_IRQ + slice;

arch/mips/sgi-ip27/ip27-irq.c

267

if (slice == 0) {

arch/mips/sgi-ip27/ip27-nmi.c

125

static void nmi_dump_hub_irq(nasid_t nasid, int slice)

arch/mips/sgi-ip27/ip27-nmi.c

129

if (slice == 0) { /* Slice A */

arch/mips/sgi-ip27/ip27-nmi.c

151

int slice;

arch/mips/sgi-ip27/ip27-nmi.c

157

for (slice = 0; slice < NODE_NUM_CPUS(slice); slice++) {

arch/mips/sgi-ip27/ip27-nmi.c

158

nmi_cpu_eframe_save(nasid, slice);

arch/mips/sgi-ip27/ip27-nmi.c

159

nmi_dump_hub_irq(nasid, slice);

arch/mips/sgi-ip27/ip27-nmi.c

30

void install_cpu_nmi_handler(int slice)

arch/mips/sgi-ip27/ip27-nmi.c

34

nmi_addr = (nmi_t *)NMI_ADDR(get_nasid(), slice);

arch/mips/sgi-ip27/ip27-nmi.c

49

static void nmi_cpu_eframe_save(nasid_t nasid, int slice)

arch/mips/sgi-ip27/ip27-nmi.c

57

slice * IP27_NMI_KREGS_CPU_SIZE);

arch/mips/sgi-ip27/ip27-nmi.c

59

pr_emerg("NMI nasid %d: slice %d\n", nasid, slice);

arch/mips/sgi-ip27/ip27-timer.c

33

int slice = cputoslice(cpu);

arch/mips/sgi-ip27/ip27-timer.c

38

LOCAL_HUB_S(PI_RT_COMPARE_A + PI_COUNT_OFFSET * slice, cnt);

arch/mips/sgi-ip27/ip27-timer.c

50

int slice = cputoslice(cpu);

arch/mips/sgi-ip27/ip27-timer.c

55

LOCAL_HUB_S(PI_RT_PEND_A + PI_COUNT_OFFSET * slice, 0);

arch/powerpc/mm/book3s64/slice.c

103

static int slice_high_has_vma(struct mm_struct *mm, unsigned long slice)

arch/powerpc/mm/book3s64/slice.c

105

unsigned long start = slice << SLICE_HIGH_SHIFT;

arch/powerpc/mm/book3s64/slice.c

267

unsigned long slice;

arch/powerpc/mm/book3s64/slice.c

269

slice = GET_LOW_SLICE_INDEX(addr);

arch/powerpc/mm/book3s64/slice.c

270

*boundary_addr = (slice + end) << SLICE_LOW_SHIFT;

arch/powerpc/mm/book3s64/slice.c

271

return !!(available->low_slices & (1u << slice));

arch/powerpc/mm/book3s64/slice.c

273

slice = GET_HIGH_SLICE_INDEX(addr);

arch/powerpc/mm/book3s64/slice.c

274

*boundary_addr = (slice + end) ?

arch/powerpc/mm/book3s64/slice.c

275

((slice + end) << SLICE_HIGH_SHIFT) : SLICE_LOW_TOP;

arch/powerpc/mm/book3s64/slice.c

276

return !!test_bit(slice, available->high_slices);

arch/powerpc/mm/book3s64/slice.c

97

static int slice_low_has_vma(struct mm_struct *mm, unsigned long slice)

arch/powerpc/mm/book3s64/slice.c

99

return !slice_area_is_free(mm, slice << SLICE_LOW_SHIFT,

arch/sparc/include/asm/vio.h

157

u8 slice;

block/partitions/sysv68.c

56

struct slice *slice;

block/partitions/sysv68.c

79

slice = (struct slice *)data;

block/partitions/sysv68.c

80

for (i = 0; i < slices; i++, slice++) {

block/partitions/sysv68.c

83

if (be32_to_cpu(slice->nblocks)) {

block/partitions/sysv68.c

85

be32_to_cpu(slice->blkoff),

block/partitions/sysv68.c

86

be32_to_cpu(slice->nblocks));

crypto/drbg.c

1282

unsigned int slice = 0;

crypto/drbg.c

1286

slice = ((buflen - len) / drbg_max_request_bytes(drbg));

crypto/drbg.c

1287

chunk = slice ? drbg_max_request_bytes(drbg) : (buflen - len);

crypto/drbg.c

1294

} while (slice > 0 && (len < buflen));

drivers/accel/qaic/qaic.h

311

struct list_head slice;

drivers/accel/qaic/qaic_data.c

1103

static inline int copy_exec_reqs(struct qaic_device *qdev, struct bo_slice *slice, u32 dbc_id,

drivers/accel/qaic/qaic_data.c

1107

struct dbc_req *reqs = slice->reqs;

drivers/accel/qaic/qaic_data.c

1112

if (avail < slice->nents)

drivers/accel/qaic/qaic_data.c

1115

if (tail + slice->nents > dbc->nelem) {

drivers/accel/qaic/qaic_data.c

1117

avail = min_t(u32, avail, slice->nents);

drivers/accel/qaic/qaic_data.c

1120

avail = slice->nents - avail;

drivers/accel/qaic/qaic_data.c

1124

memcpy(fifo_at(dbc->req_q_base, tail), reqs, sizeof(*reqs) * slice->nents);

drivers/accel/qaic/qaic_data.c

1127

*ptail = (tail + slice->nents) % dbc->nelem;

drivers/accel/qaic/qaic_data.c

1132

static inline int copy_partial_exec_reqs(struct qaic_device *qdev, struct bo_slice *slice,

drivers/accel/qaic/qaic_data.c

1136

struct dbc_req *reqs = slice->reqs;

drivers/accel/qaic/qaic_data.c

1152

for (first_n = 0; first_n < slice->nents; first_n++)

drivers/accel/qaic/qaic_data.c

1180

memcpy(last_req, reqs + slice->nents - 1, sizeof(*reqs));

drivers/accel/qaic/qaic_data.c

1206

struct bo_slice *slice;

drivers/accel/qaic/qaic_data.c

1248

list_for_each_entry(slice, &bo->slices, slice) {

drivers/accel/qaic/qaic_data.c

1249

for (j = 0; j < slice->nents; j++)

drivers/accel/qaic/qaic_data.c

1250

slice->reqs[j].req_id = cpu_to_le16(bo->req_id);

drivers/accel/qaic/qaic_data.c

1252

if (is_partial && (!pexec[i].resize || pexec[i].resize <= slice->offset))

drivers/accel/qaic/qaic_data.c

1254

ret = copy_partial_exec_reqs(qdev, slice, 0, dbc, head, tail);

drivers/accel/qaic/qaic_data.c

1255

else if (is_partial && pexec[i].resize < slice->offset + slice->size)

drivers/accel/qaic/qaic_data.c

1257

ret = copy_partial_exec_reqs(qdev, slice,

drivers/accel/qaic/qaic_data.c

1258

pexec[i].resize - slice->offset, dbc,

drivers/accel/qaic/qaic_data.c

1261

ret = copy_exec_reqs(qdev, slice, dbc->id, head, tail);

drivers/accel/qaic/qaic_data.c

162

struct bo_slice *slice = container_of(kref, struct bo_slice, ref_count);

drivers/accel/qaic/qaic_data.c

164

slice->bo->total_slice_nents -= slice->nents;

drivers/accel/qaic/qaic_data.c

165

list_del(&slice->slice);

drivers/accel/qaic/qaic_data.c

166

drm_gem_object_put(&slice->bo->base);

drivers/accel/qaic/qaic_data.c

167

sg_free_table(slice->sgt);

drivers/accel/qaic/qaic_data.c

168

kfree(slice->sgt);

drivers/accel/qaic/qaic_data.c

169

kvfree(slice->reqs);

drivers/accel/qaic/qaic_data.c

170

kfree(slice);

drivers/accel/qaic/qaic_data.c

256

static int encode_reqs(struct qaic_device *qdev, struct bo_slice *slice,

drivers/accel/qaic/qaic_data.c

268

if (!slice->no_xfer)

drivers/accel/qaic/qaic_data.c

269

cmd |= (slice->dir == DMA_TO_DEVICE ? INBOUND_XFER : OUTBOUND_XFER);

drivers/accel/qaic/qaic_data.c

308

for_each_sgtable_dma_sg(slice->sgt, sg, i) {

drivers/accel/qaic/qaic_data.c

309

slice->reqs[i].cmd = cmd;

drivers/accel/qaic/qaic_data.c

310

slice->reqs[i].src_addr = cpu_to_le64(slice->dir == DMA_TO_DEVICE ?

drivers/accel/qaic/qaic_data.c

312

slice->reqs[i].dest_addr = cpu_to_le64(slice->dir == DMA_TO_DEVICE ?

drivers/accel/qaic/qaic_data.c

320

slice->reqs[i].len = cpu_to_le32((u32)sg_dma_len(sg));

drivers/accel/qaic/qaic_data.c

323

slice->reqs[i].sem_cmd0 = cpu_to_le32(ENCODE_SEM(req->sem0.val,

drivers/accel/qaic/qaic_data.c

330

slice->reqs[i].sem_cmd1 = cpu_to_le32(ENCODE_SEM(req->sem1.val,

drivers/accel/qaic/qaic_data.c

337

slice->reqs[i].sem_cmd2 = cpu_to_le32(ENCODE_SEM(req->sem2.val,

drivers/accel/qaic/qaic_data.c

344

slice->reqs[i].sem_cmd3 = cpu_to_le32(ENCODE_SEM(req->sem3.val,

drivers/accel/qaic/qaic_data.c

355

slice->reqs[i].cmd |= GEN_COMPLETION;

drivers/accel/qaic/qaic_data.c

356

slice->reqs[i].db_addr = db_addr;

drivers/accel/qaic/qaic_data.c

357

slice->reqs[i].db_len = db_len;

drivers/accel/qaic/qaic_data.c

358

slice->reqs[i].db_data = db_data;

drivers/accel/qaic/qaic_data.c

373

req->sem0.flags |= (slice->dir == DMA_TO_DEVICE ?

drivers/accel/qaic/qaic_data.c

375

slice->reqs[i].sem_cmd0 = cpu_to_le32(ENCODE_SEM(req->sem0.val, req->sem0.index,

drivers/accel/qaic/qaic_data.c

378

slice->reqs[i].sem_cmd1 = cpu_to_le32(ENCODE_SEM(req->sem1.val, req->sem1.index,

drivers/accel/qaic/qaic_data.c

381

slice->reqs[i].sem_cmd2 = cpu_to_le32(ENCODE_SEM(req->sem2.val, req->sem2.index,

drivers/accel/qaic/qaic_data.c

384

slice->reqs[i].sem_cmd3 = cpu_to_le32(ENCODE_SEM(req->sem3.val, req->sem3.index,

drivers/accel/qaic/qaic_data.c

395

struct bo_slice *slice;

drivers/accel/qaic/qaic_data.c

402

slice = kmalloc_obj(*slice);

drivers/accel/qaic/qaic_data.c

403

if (!slice) {

drivers/accel/qaic/qaic_data.c

408

slice->reqs = kvzalloc_objs(*slice->reqs, sgt->nents);

drivers/accel/qaic/qaic_data.c

409

if (!slice->reqs) {

drivers/accel/qaic/qaic_data.c

414

slice->no_xfer = !slice_ent->size;

drivers/accel/qaic/qaic_data.c

415

slice->sgt = sgt;

drivers/accel/qaic/qaic_data.c

416

slice->nents = sgt->nents;

drivers/accel/qaic/qaic_data.c

417

slice->dir = bo->dir;

drivers/accel/qaic/qaic_data.c

418

slice->bo = bo;

drivers/accel/qaic/qaic_data.c

419

slice->size = slice_ent->size;

drivers/accel/qaic/qaic_data.c

420

slice->offset = slice_ent->offset;

drivers/accel/qaic/qaic_data.c

422

ret = encode_reqs(qdev, slice, slice_ent);

drivers/accel/qaic/qaic_data.c

427

kref_init(&slice->ref_count);

drivers/accel/qaic/qaic_data.c

429

list_add_tail(&slice->slice, &bo->slices);

drivers/accel/qaic/qaic_data.c

434

kvfree(slice->reqs);

drivers/accel/qaic/qaic_data.c

436

kfree(slice);

drivers/accel/qaic/qaic_data.c

937

struct bo_slice *slice, *temp;

drivers/accel/qaic/qaic_data.c

939

list_for_each_entry_safe(slice, temp, &bo->slices, slice)

drivers/accel/qaic/qaic_data.c

940

kref_put(&slice->ref_count, free_slice);

drivers/block/sunvdc.c

510

desc->slice = 0xff;

drivers/block/sunvdc.c

512

desc->slice = 0;

drivers/block/sunvdc.c

679

desc->slice = 0;

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.h

43

#define ADF_TL_SLICE_REG_OFF(slice, reg, qat_gen) \

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.h

44

(ADF_TL_DEV_REG_OFF(slice##_slices[0], qat_gen) + \

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.h

47

#define ADF_TL_CMDQ_REG_OFF(slice, reg, qat_gen) \

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.h

48

(ADF_TL_DEV_REG_OFF(slice##_cmdq[0], qat_gen) + \

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

105

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

111

for_each_dbuf_slice_in_mask(display, slice, dbuf_mask) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

112

dbuf_bw->max_bw[slice] = max(dbuf_bw->max_bw[slice], data_rate);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

113

dbuf_bw->active_planes[slice] |= BIT(plane_id);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

153

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

155

for_each_dbuf_slice(display, slice) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

167

max_bw = max(dbuf_bw->max_bw[slice], max_bw);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

168

num_active_planes += hweight8(dbuf_bw->active_planes[slice]);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

67

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

69

for_each_dbuf_slice(display, slice) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

70

if (old_dbuf_bw->max_bw[slice] != new_dbuf_bw->max_bw[slice] ||

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

71

old_dbuf_bw->active_planes[slice] != new_dbuf_bw->active_planes[slice])

drivers/gpu/drm/i915/display/intel_display_power.c

1070

enum dbuf_slice slice, bool enable)

drivers/gpu/drm/i915/display/intel_display_power.c

1072

i915_reg_t reg = DBUF_CTL_S(slice);

drivers/gpu/drm/i915/display/intel_display_power.c

1083

slice, str_enable_disable(enable));

drivers/gpu/drm/i915/display/intel_display_power.c

1091

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/intel_display_power.c

1109

for_each_dbuf_slice(display, slice)

drivers/gpu/drm/i915/display/intel_display_power.c

1110

gen9_dbuf_slice_set(display, slice, req_slices & BIT(slice));

drivers/gpu/drm/i915/display/intel_display_power.c

1145

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/intel_display_power.c

1147

for_each_dbuf_slice(display, slice)

drivers/gpu/drm/i915/display/intel_display_power.c

1148

intel_de_rmw(display, DBUF_CTL_S(slice),

drivers/gpu/drm/i915/display/skl_watermark.c

3491

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/skl_watermark.c

3509

for_each_dbuf_slice(display, slice)

drivers/gpu/drm/i915/display/skl_watermark.c

3511

intel_de_rmw(display, DBUF_CTL_S(slice),

drivers/gpu/drm/i915/display/skl_watermark.c

3515

intel_de_rmw(display, DBUF_CTL_S(slice),

drivers/gpu/drm/i915/display/skl_watermark.c

80

enum dbuf_slice slice;

drivers/gpu/drm/i915/display/skl_watermark.c

82

for_each_dbuf_slice(display, slice) {

drivers/gpu/drm/i915/display/skl_watermark.c

83

if (intel_de_read(display, DBUF_CTL_S(slice)) & DBUF_POWER_STATE)

drivers/gpu/drm/i915/display/skl_watermark.c

84

enabled_slices |= BIT(slice);

drivers/gpu/drm/i915/display/skl_watermark_regs.h

60

#define DBUF_CTL_S(slice) _MMIO(_PICK(slice, \

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1774

int slice;

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1796

for_each_ss_steering(iter, engine->gt, slice, subslice) {

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1797

instdone->sampler[slice][subslice] =

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1800

slice, subslice);

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1801

instdone->row[slice][subslice] =

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1804

slice, subslice);

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1808

for_each_ss_steering(iter, engine->gt, slice, subslice)

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1809

instdone->geom_svg[slice][subslice] =

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1812

slice, subslice);

drivers/gpu/drm/i915/gt/intel_gt_regs.h

453

#define GEN9_IZ_HASHING_MASK(slice) (0x3 << ((slice) * 2))

drivers/gpu/drm/i915/gt/intel_gt_regs.h

454

#define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2))

drivers/gpu/drm/i915/gt/intel_gt_regs.h

514

#define GEN9_SLICE_PGCTL_ACK(slice) _MMIO(0x804c + (slice) * 0x4)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

518

#define GEN10_SLICE_PGCTL_ACK(slice) _MMIO(0x804c + ((slice) / 3) * 0x34 + \

drivers/gpu/drm/i915/gt/intel_gt_regs.h

519

((slice) % 3) * 0x4)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

520

#define GEN10_PGCTL_VALID_SS_MASK(slice) ((slice) == 0 ? REG_GENMASK(6, 0) : REG_GENMASK(4, 0))

drivers/gpu/drm/i915/gt/intel_gt_regs.h

522

#define GEN9_SS01_EU_PGCTL_ACK(slice) _MMIO(0x805c + (slice) * 0x8)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

523

#define GEN10_SS01_EU_PGCTL_ACK(slice) _MMIO(0x805c + ((slice) / 3) * 0x30 + \

drivers/gpu/drm/i915/gt/intel_gt_regs.h

524

((slice) % 3) * 0x8)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

525

#define GEN9_SS23_EU_PGCTL_ACK(slice) _MMIO(0x8060 + (slice) * 0x8)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

526

#define GEN10_SS23_EU_PGCTL_ACK(slice) _MMIO(0x8060 + ((slice) / 3) * 0x30 + \

drivers/gpu/drm/i915/gt/intel_gt_regs.h

527

((slice) % 3) * 0x8)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

609

#define GEN9_EU_DISABLE(slice) _MMIO(0x9134 + (slice) * 0x4)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

71

#define GEN8_MCR_SLICE(slice) (((slice) & 3) << 26)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

76

#define GEN11_MCR_SLICE(slice) (((slice) & 0xf) << 27)

drivers/gpu/drm/i915/gt/intel_gt_regs.h

975

#define GEN7_L3LOG(slice, i) _MMIO(0xb070 + (slice) * 0x200 + (i) * 4)

drivers/gpu/drm/i915/gt/intel_ring_submission.c

844

static int remap_l3_slice(struct i915_request *rq, int slice)

drivers/gpu/drm/i915/gt/intel_ring_submission.c

847

u32 *cs, *remap_info = rq->i915->l3_parity.remap_info[slice];

drivers/gpu/drm/i915/gt/intel_ring_submission.c

864

*cs++ = i915_mmio_reg_offset(GEN7_L3LOG(slice, i));

drivers/gpu/drm/i915/gt/intel_sseu.c

40

intel_sseu_get_hsw_subslices(const struct sseu_dev_info *sseu, u8 slice)

drivers/gpu/drm/i915/gt/intel_sseu.c

43

if (WARN_ON(slice >= sseu->max_slices))

drivers/gpu/drm/i915/gt/intel_sseu.c

46

return sseu->subslice_mask.hsw[slice];

drivers/gpu/drm/i915/gt/intel_sseu.c

49

static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice,

drivers/gpu/drm/i915/gt/intel_sseu.c

53

WARN_ON(slice > 0);

drivers/gpu/drm/i915/gt/intel_sseu.c

56

return sseu->eu_mask.hsw[slice][subslice];

drivers/gpu/drm/i915/gt/intel_sseu.c

60

static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice,

drivers/gpu/drm/i915/gt/intel_sseu.c

65

GEM_WARN_ON(slice > 0);

drivers/gpu/drm/i915/gt/intel_sseu.c

68

sseu->eu_mask.hsw[slice][subslice] = eu_mask;

drivers/gpu/drm/i915/gt/intel_sseu.h

122

intel_sseu_has_subslice(const struct sseu_dev_info *sseu, int slice,

drivers/gpu/drm/i915/gt/intel_sseu.h

125

if (slice >= sseu->max_slices ||

drivers/gpu/drm/i915/gt/intel_sseu.h

132

return sseu->subslice_mask.hsw[slice] & BIT(subslice);

drivers/gpu/drm/i915/gt/intel_sseu.h

156

intel_sseu_get_hsw_subslices(const struct sseu_dev_info *sseu, u8 slice);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1143

unsigned int slice, subslice;

drivers/gpu/drm/i915/gt/intel_workarounds.c

1159

slice = ffs(sseu->slice_mask) - 1;

drivers/gpu/drm/i915/gt/intel_workarounds.c

1160

GEM_BUG_ON(slice >= ARRAY_SIZE(sseu->subslice_mask.hsw));

drivers/gpu/drm/i915/gt/intel_workarounds.c

1161

subslice = ffs(intel_sseu_get_hsw_subslices(sseu, slice));

drivers/gpu/drm/i915/gt/intel_workarounds.c

1169

mcr = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1172

drm_dbg(&i915->drm, "MCR slice:%d/subslice:%d = %x\n", slice, subslice, mcr);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1271

unsigned int slice, unsigned int subslice)

drivers/gpu/drm/i915/gt/intel_workarounds.c

1275

mcr = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1291

unsigned int slice, unsigned int subslice)

drivers/gpu/drm/i915/gt/intel_workarounds.c

1293

__set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1295

gt->default_steering.groupid = slice;

drivers/gpu/drm/i915/gt/intel_workarounds.c

1336

unsigned long slice, subslice = 0, slice_mask = 0;

drivers/gpu/drm/i915/gt/intel_workarounds.c

1392

slice = __ffs(slice_mask);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1393

subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice) %

drivers/gpu/drm/i915/gt/intel_workarounds.c

1396

__add_mcr_wa(gt, wal, slice, subslice);

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

296

int slice, subslice, iter, i, num_steer_regs, num_tot_regs = 0;

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

316

for_each_ss_steering(iter, gt, slice, subslice)

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

333

for_each_ss_steering(iter, gt, slice, subslice) {

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

335

__fill_ext_reg(extarray, &gen8_extregs[i], slice, subslice);

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

341

__fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice);

drivers/gpu/drm/i915/i915_gpu_error.c

442

int slice;

drivers/gpu/drm/i915/i915_gpu_error.c

458

for_each_ss_steering(iter, ee->engine->gt, slice, subslice)

drivers/gpu/drm/i915/i915_gpu_error.c

460

slice, subslice,

drivers/gpu/drm/i915/i915_gpu_error.c

461

ee->instdone.sampler[slice][subslice]);

drivers/gpu/drm/i915/i915_gpu_error.c

463

for_each_ss_steering(iter, ee->engine->gt, slice, subslice)

drivers/gpu/drm/i915/i915_gpu_error.c

465

slice, subslice,

drivers/gpu/drm/i915/i915_gpu_error.c

466

ee->instdone.row[slice][subslice]);

drivers/gpu/drm/i915/i915_gpu_error.c

472

for_each_ss_steering(iter, ee->engine->gt, slice, subslice)

drivers/gpu/drm/i915/i915_gpu_error.c

474

slice, subslice,

drivers/gpu/drm/i915/i915_gpu_error.c

475

ee->instdone.geom_svg[slice][subslice]);

drivers/gpu/drm/i915/i915_irq.c

164

u8 slice = 0;

drivers/gpu/drm/i915/i915_irq.c

175

while ((slice = ffs(dev_priv->l3_parity.which_slice)) != 0) {

drivers/gpu/drm/i915/i915_irq.c

178

slice--;

drivers/gpu/drm/i915/i915_irq.c

180

slice >= NUM_L3_SLICES(dev_priv)))

drivers/gpu/drm/i915/i915_irq.c

183

dev_priv->l3_parity.which_slice &= ~(1<<slice);

drivers/gpu/drm/i915/i915_irq.c

185

reg = GEN7_L3CDERRST1(slice);

drivers/gpu/drm/i915/i915_irq.c

199

parity_event[4] = kasprintf(GFP_KERNEL, "SLICE=%d", slice);

drivers/gpu/drm/i915/i915_irq.c

207

slice, row, bank, subbank);

drivers/gpu/drm/i915/i915_reg.h

1188

#define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */

drivers/gpu/drm/i915/i915_sysfs.c

116

if (i915->l3_parity.remap_info[slice]) {

drivers/gpu/drm/i915/i915_sysfs.c

118

remap_info = i915->l3_parity.remap_info[slice];

drivers/gpu/drm/i915/i915_sysfs.c

120

i915->l3_parity.remap_info[slice] = remap_info;

drivers/gpu/drm/i915/i915_sysfs.c

128

ctx->remap_slice |= BIT(slice);

drivers/gpu/drm/i915/i915_sysfs.c

70

int slice = (int)(uintptr_t)attr->private;

drivers/gpu/drm/i915/i915_sysfs.c

82

if (i915->l3_parity.remap_info[slice])

drivers/gpu/drm/i915/i915_sysfs.c

84

i915->l3_parity.remap_info[slice] + offset / sizeof(u32),

drivers/gpu/drm/i915/i915_sysfs.c

98

int slice = (int)(uintptr_t)attr->private;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

19

static void a8xx_aperture_slice_set(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

25

val = A8XX_CP_APERTURE_CNTL_HOST_PIPEID(pipe) | A8XX_CP_APERTURE_CNTL_HOST_SLICEID(slice);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

70

static u32 a8xx_read_pipe_slice(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice, u32 offset)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

78

a8xx_aperture_slice_set(gpu, pipe, slice);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

889

u32 slice = a8xx_get_first_slice(a6xx_gpu);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

914

status = a8xx_read_pipe_slice(gpu, pipe_id, slice,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

921

status = a8xx_read_pipe_slice(gpu, pipe_id, slice,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

928

status = a8xx_read_pipe_slice(gpu, pipe_id, slice,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

935

status = a8xx_read_pipe_slice(gpu, pipe_id, slice,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

213

const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

220

ltc->lts_nr = slice;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

110

const u32 slice = nvkm_rd32(device, 0x17e280) >> 28;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

117

ltc->lts_nr = slice;

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

465

struct tcm_area slice, area_s;

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

487

tcm_for_each_slice(slice, *area, area_s) {

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

489

.x0 = slice.p0.x, .y0 = slice.p0.y,

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

490

.x1 = slice.p1.x, .y1 = slice.p1.y,

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

495

roll += tcm_sizeof(slice);

drivers/gpu/drm/omapdrm/tcm.h

222

static inline void tcm_slice(struct tcm_area *parent, struct tcm_area *slice)

drivers/gpu/drm/omapdrm/tcm.h

224

*slice = *parent;

drivers/gpu/drm/omapdrm/tcm.h

227

if (slice->tcm && !slice->is2d &&

drivers/gpu/drm/omapdrm/tcm.h

228

slice->p0.y != slice->p1.y &&

drivers/gpu/drm/omapdrm/tcm.h

229

(slice->p0.x || (slice->p1.x != slice->tcm->width - 1))) {

drivers/gpu/drm/omapdrm/tcm.h

231

slice->p1.x = slice->tcm->width - 1;

drivers/gpu/drm/omapdrm/tcm.h

232

slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1;

drivers/gpu/drm/omapdrm/tcm.h

235

parent->p0.y = slice->p1.y + 1;

drivers/gpu/drm/radeon/evergreen_cs.c

399

unsigned pitch, slice, mslice;

drivers/gpu/drm/radeon/evergreen_cs.c

405

slice = track->cb_color_slice[id];

drivers/gpu/drm/radeon/evergreen_cs.c

407

surf.nby = ((slice + 1) * 64) / surf.nbx;

drivers/gpu/drm/radeon/evergreen_cs.c

469

slice = ((nby * surf.nbx) / 64) - 1;

drivers/gpu/drm/radeon/evergreen_cs.c

474

ib[track->cb_color_slice_idx[id]] = slice;

drivers/gpu/drm/radeon/evergreen_cs.c

484

radeon_bo_size(track->cb_color_bo[id]), slice);

drivers/gpu/drm/radeon/evergreen_cs.c

566

unsigned pitch, slice, mslice;

drivers/gpu/drm/radeon/evergreen_cs.c

572

slice = track->db_depth_slice;

drivers/gpu/drm/radeon/evergreen_cs.c

574

surf.nby = ((slice + 1) * 64) / surf.nbx;

drivers/gpu/drm/radeon/evergreen_cs.c

663

unsigned pitch, slice, mslice;

drivers/gpu/drm/radeon/evergreen_cs.c

669

slice = track->db_depth_slice;

drivers/gpu/drm/radeon/evergreen_cs.c

671

surf.nby = ((slice + 1) * 64) / surf.nbx;

drivers/gpu/drm/xe/regs/xe_gt_regs.h

58

#define MCR_SLICE(slice) REG_FIELD_PREP(MCR_SLICE_MASK, slice)

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

385

int slice;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

400

for (slice = 0; slice < MAX_MEDIA_SLICES; slice++) {

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

402

slice_to_group[slice] = group++;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

439

slice = hwe->instance / 2;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

442

slice = hwe->instance;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

445

slice = 0;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

451

slice = 0;

drivers/gpu/drm/xe/xe_gt_sriov_pf_policy.c

454

values[slice_to_group[slice]].engines[guc_class] |= BIT(hwe->logical_instance);

drivers/gpu/drm/xe/xe_guc_capture.c

424

u16 slice, subslice;

drivers/gpu/drm/xe/xe_guc_capture.c

482

for_each_dss_steering(dss, gt, slice, subslice) {

drivers/gpu/drm/xe/xe_guc_capture.c

484

__fill_ext_reg(extarray, &xe_extregs[i], dss, slice, subslice);

drivers/gpu/drm/xe/xe_guc_capture.c

490

__fill_ext_reg(extarray, &xehpg_extregs[i], dss, slice, subslice);

drivers/gpu/drm/xe/xe_trace.h

456

TP_PROTO(u8 slice, u8 subslice,

drivers/gpu/drm/xe/xe_trace.h

459

TP_ARGS(slice, subslice,

drivers/gpu/drm/xe/xe_trace.h

463

TP_STRUCT__entry(__field(u8, slice)

drivers/gpu/drm/xe/xe_trace.h

471

TP_fast_assign(__entry->slice = slice;

drivers/gpu/drm/xe/xe_trace.h

480

__entry->slice, __entry->subslice,

drivers/hid/surface-hid/surface_hid.c

45

struct surface_hid_buffer_slice *slice;

drivers/hid/surface-hid/surface_hid.c

70

slice = (struct surface_hid_buffer_slice *)buffer;

drivers/hid/surface-hid/surface_hid.c

71

slice->entry = entry;

drivers/hid/surface-hid/surface_hid.c

72

slice->end = 0;

drivers/hid/surface-hid/surface_hid.c

77

while (!slice->end && offset < len) {

drivers/hid/surface-hid/surface_hid.c

78

put_unaligned_le32(offset, &slice->offset);

drivers/hid/surface-hid/surface_hid.c

79

put_unaligned_le32(length, &slice->length);

drivers/hid/surface-hid/surface_hid.c

84

sizeof(*slice));

drivers/hid/surface-hid/surface_hid.c

88

offset = get_unaligned_le32(&slice->offset);

drivers/hid/surface-hid/surface_hid.c

89

length = get_unaligned_le32(&slice->length);

drivers/hid/surface-hid/surface_hid.c

98

memcpy(buf + offset, &slice->data[0], length);

drivers/hte/hte-tegra194.c

109

int slice;

drivers/hte/hte-tegra194.c

371

if (m[eid].slice == NV_AON_SLICE_INVALID)

drivers/hte/hte-tegra194.c

374

*mapped = (m[eid].slice << 5) + m[eid].bit_index;

drivers/hte/hte-tegra194.c

459

u32 slice, sl_bit_shift, line_bit, val, reg;

drivers/hte/hte-tegra194.c

476

slice = line_id >> sl_bit_shift;

drivers/hte/hte-tegra194.c

478

reg = (slice << sl_bit_shift) + HTE_SLICE0_TETEN;

drivers/hte/hte-tegra194.c

480

spin_lock(&gs->sl[slice].s_lock);

drivers/hte/hte-tegra194.c

482

if (test_bit(HTE_SUSPEND, &gs->sl[slice].flags)) {

drivers/hte/hte-tegra194.c

483

spin_unlock(&gs->sl[slice].s_lock);

drivers/hte/hte-tegra194.c

495

spin_unlock(&gs->sl[slice].s_lock);

drivers/hte/hte-tegra194.c

498

line_id, slice, line_bit, reg);

drivers/hte/hte-tegra194.c

603

u32 tsh, tsl, src, pv, cv, acv, slice, bit_index, line_id;

drivers/hte/hte-tegra194.c

615

slice = (src >> HTE_TESRC_SLICE_SHIFT) &

drivers/hte/hte-tegra194.c

623

line_id = bit_index + (slice << 5);

drivers/media/platform/ti/vpe/vip.c

3455

static int vip_probe_slice(struct platform_device *pdev, int slice)

drivers/media/platform/ti/vpe/vip.c

3468

dev->irq = platform_get_irq(pdev, slice);

drivers/media/platform/ti/vpe/vip.c

3480

dev->slice_id = slice;

drivers/media/platform/ti/vpe/vip.c

3486

shared->devs[slice] = dev;

drivers/media/platform/ti/vpe/vip.c

3495

parser->base = dev->base + (slice ? VIP_SLICE1_PARSER : VIP_SLICE0_PARSER);

drivers/media/platform/ti/vpe/vip.c

3507

sc->base = dev->base + (slice ? VIP_SLICE1_SC : VIP_SLICE0_SC);

drivers/media/platform/ti/vpe/vip.c

3519

csc->base = dev->base + (slice ? VIP_SLICE1_CSC : VIP_SLICE0_CSC);

drivers/media/platform/ti/vpe/vip.c

3532

int ret, slice = VIP_SLICE1;

drivers/media/platform/ti/vpe/vip.c

3588

for (slice = VIP_SLICE1; slice < VIP_NUM_SLICES; slice++) {

drivers/media/platform/ti/vpe/vip.c

3589

ret = vip_probe_slice(pdev, slice);

drivers/media/platform/ti/vpe/vip.c

3632

int slice;

drivers/media/platform/ti/vpe/vip.c

3634

for (slice = 0; slice < VIP_NUM_SLICES; slice++) {

drivers/media/platform/ti/vpe/vip.c

3635

dev = shared->devs[slice];

drivers/misc/eeprom/max6875.c

100

data->valid |= (1 << slice);

drivers/misc/eeprom/max6875.c

112

int slice, max_slice;

drivers/misc/eeprom/max6875.c

116

for (slice = (off >> SLICE_BITS); slice <= max_slice; slice++)

drivers/misc/eeprom/max6875.c

117

max6875_update_slice(client, slice);

drivers/misc/eeprom/max6875.c

54

static void max6875_update_slice(struct i2c_client *client, int slice)

drivers/misc/eeprom/max6875.c

60

if (slice >= USER_EEPROM_SLICES)

drivers/misc/eeprom/max6875.c

65

buf = &data->data[slice << SLICE_BITS];

drivers/misc/eeprom/max6875.c

67

if (!(data->valid & (1 << slice)) ||

drivers/misc/eeprom/max6875.c

68

time_after(jiffies, data->last_updated[slice])) {

drivers/misc/eeprom/max6875.c

70

dev_dbg(&client->dev, "Starting update of slice %u\n", slice);

drivers/misc/eeprom/max6875.c

72

data->valid &= ~(1 << slice);

drivers/misc/eeprom/max6875.c

74

addr = USER_EEPROM_BASE + (slice << SLICE_BITS);

drivers/misc/eeprom/max6875.c

99

data->last_updated[slice] = jiffies;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1806

int slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1847

for (slice = 0; slice < mgp->num_slices; slice++) {

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1848

ss = &mgp->ss[slice];

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1849

data[i++] = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1953

int i, slice, status;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1957

slice = ss - mgp->ss;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1958

cmd.data0 = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

1963

cmd.data0 = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2034

slice, ss->rx_small.fill_cnt);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2041

slice, ss->rx_big.fill_cnt);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2243

static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice)

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2249

ss = &mgp->ss[slice];

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2251

if (slice == 0 || (mgp->dev->real_num_tx_queues > 1)) {

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2252

cmd.data0 = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2260

cmd.data0 = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2268

cmd.data0 = slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2274

(mgp->sram + MXGEFW_ETH_SEND_GO + 64 * slice);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2276

(mgp->sram + MXGEFW_ETH_SEND_STOP + 64 * slice);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2281

static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice)

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2287

ss = &mgp->ss[slice];

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2290

cmd.data2 = sizeof(struct mcp_irq_data) | (slice << 16);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2294

if (slice != 0)

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2315

int i, status, big_pow2, slice;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2406

for (slice = 0; slice < mgp->num_slices; slice++) {

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2407

ss = &mgp->ss[slice];

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2409

status = myri10ge_get_txrx(mgp, slice);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2421

if (slice == 0 || mgp->dev->real_num_tx_queues > 1)

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2422

status = myri10ge_set_stats(mgp, slice);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2477

while (slice) {

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2478

slice--;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

2479

napi_disable(&mgp->ss[slice].napi);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

3372

int slice = ss - mgp->ss;

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

3381

"check link partner\n", slice);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

3385

slice, ss->tx.queue_active, ss->tx.req,

drivers/net/ethernet/myricom/myri10ge/myri10ge.c

3388

(int)ntohl(mgp->ss[slice].fw_stats->

drivers/net/ethernet/ti/icssg/icssg_classifier.c

205

static void rx_class_ft1_set_start_len(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

210

offset = offs[slice].ft1_start_len;

drivers/net/ethernet/ti/icssg/icssg_classifier.c

215

static void rx_class_ft1_set_da(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

220

offset = FT1_N_REG(slice, n, FT1_DA0);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

223

offset = FT1_N_REG(slice, n, FT1_DA1);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

227

static void rx_class_ft1_set_da_mask(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

232

offset = FT1_N_REG(slice, n, FT1_DA0_MASK);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

235

offset = FT1_N_REG(slice, n, FT1_DA1_MASK);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

239

static void rx_class_ft1_cfg_set_type(struct regmap *miig_rt, int slice, int n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

244

offset = offs[slice].ft1_cfg;

drivers/net/ethernet/ti/icssg/icssg_classifier.c

249

static void rx_class_sel_set_type(struct regmap *miig_rt, int slice, int n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

254

offset = offs[slice].rx_class_cfg1;

drivers/net/ethernet/ti/icssg/icssg_classifier.c

259

static void rx_class_set_and(struct regmap *miig_rt, int slice, int n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

264

offset = RX_CLASS_N_REG(slice, n, RX_CLASS_AND_EN);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

268

static void rx_class_set_or(struct regmap *miig_rt, int slice, int n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

273

offset = RX_CLASS_N_REG(slice, n, RX_CLASS_OR_EN);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

277

static u32 rx_class_get_or(struct regmap *miig_rt, int slice, int n)

drivers/net/ethernet/ti/icssg/icssg_classifier.c

281

offset = RX_CLASS_N_REG(slice, n, RX_CLASS_OR_EN);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

295

void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac)

drivers/net/ethernet/ti/icssg/icssg_classifier.c

297

regmap_write(miig_rt, offs[slice].mac0, (u32)(mac[0] | mac[1] << 8 |

drivers/net/ethernet/ti/icssg/icssg_classifier.c

299

regmap_write(miig_rt, offs[slice].mac1, (u32)(mac[4] | mac[5] << 8));

drivers/net/ethernet/ti/icssg/icssg_classifier.c

303

static void icssg_class_ft1_add_mcast(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

31

(offs[slice].ft1_slot_base + FT1_SLOT_SIZE * (n) + (reg))

drivers/net/ethernet/ti/icssg/icssg_classifier.c

311

rx_class_ft1_set_da(miig_rt, slice, slot, addr);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

312

rx_class_ft1_set_da_mask(miig_rt, slice, slot, mask);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

313

rx_class_ft1_cfg_set_type(miig_rt, slice, slot, FT1_CFG_TYPE_EQ);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

317

val = rx_class_get_or(miig_rt, slice, i);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

319

rx_class_set_or(miig_rt, slice, i, val);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

324

void icssg_class_disable(struct regmap *miig_rt, int slice)

drivers/net/ethernet/ti/icssg/icssg_classifier.c

335

rx_class_set_and(miig_rt, slice, n, 0);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

337

rx_class_set_or(miig_rt, slice, n, 0);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

340

rx_class_sel_set_type(miig_rt, slice, n, RX_CLASS_SEL_TYPE_OR);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

343

offset = RX_CLASS_GATES_N_REG(slice, n);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

356

rx_class_ft1_cfg_set_type(miig_rt, slice, n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

358

rx_class_ft1_set_da(miig_rt, slice, n, addr);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

359

rx_class_ft1_set_da_mask(miig_rt, slice, n, addr);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

363

regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

367

void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

375

icssg_class_disable(miig_rt, slice);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

386

rx_class_set_or(miig_rt, slice, n, data);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

389

rx_class_sel_set_type(miig_rt, slice, n,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

394

regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

398

void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice)

drivers/net/ethernet/ti/icssg/icssg_classifier.c

404

icssg_class_disable(miig_rt, slice);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

409

offset = RX_CLASS_GATES_N_REG(slice, n);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

417

void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

424

rx_class_ft1_set_start_len(miig_rt, slice, 0, 6);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

430

icssg_class_ft1_add_mcast(miig_rt, slice, 0,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

432

icssg_class_ft1_add_mcast(miig_rt, slice, 1,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

447

icssg_class_default(miig_rt, slice, 1, true);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

452

icssg_class_ft1_add_mcast(miig_rt, slice, slot,

drivers/net/ethernet/ti/icssg/icssg_classifier.c

460

void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr)

drivers/net/ethernet/ti/icssg/icssg_classifier.c

464

rx_class_ft1_set_start_len(miig_rt, slice, ETH_ALEN, ETH_ALEN);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

465

rx_class_ft1_set_da(miig_rt, slice, 0, mac_addr);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

466

rx_class_ft1_set_da_mask(miig_rt, slice, 0, mask_addr);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

467

rx_class_ft1_cfg_set_type(miig_rt, slice, 0, FT1_CFG_TYPE_EQ);

drivers/net/ethernet/ti/icssg/icssg_classifier.c

66

(offs[slice].ft3_slot_base + FT3_SLOT_SIZE * (n) + (reg))

drivers/net/ethernet/ti/icssg/icssg_classifier.c

74

#define RX_CLASS_N_REG(slice, n, reg) \

drivers/net/ethernet/ti/icssg/icssg_classifier.c

75

(offs[slice].rx_class_base + RX_CLASS_EN_SIZE * (n) + (reg))

drivers/net/ethernet/ti/icssg/icssg_classifier.c

80

#define RX_CLASS_GATES_N_REG(slice, n) \

drivers/net/ethernet/ti/icssg/icssg_classifier.c

81

(offs[slice].rx_class_gates_base + RX_CLASS_GATES_SIZE * (n))

drivers/net/ethernet/ti/icssg/icssg_common.c

1733

int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1)

drivers/net/ethernet/ti/icssg/icssg_common.c

1742

switch (slice) {

drivers/net/ethernet/ti/icssg/icssg_common.c

1753

prueth->pru[slice] = pru_rproc_get(np, idx, &pruss_id);

drivers/net/ethernet/ti/icssg/icssg_common.c

1754

if (IS_ERR(prueth->pru[slice])) {

drivers/net/ethernet/ti/icssg/icssg_common.c

1755

ret = PTR_ERR(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

1756

prueth->pru[slice] = NULL;

drivers/net/ethernet/ti/icssg/icssg_common.c

1757

return dev_err_probe(dev, ret, "unable to get PRU%d\n", slice);

drivers/net/ethernet/ti/icssg/icssg_common.c

1759

prueth->pru_id[slice] = pruss_id;

drivers/net/ethernet/ti/icssg/icssg_common.c

1762

prueth->rtu[slice] = pru_rproc_get(np, idx, NULL);

drivers/net/ethernet/ti/icssg/icssg_common.c

1763

if (IS_ERR(prueth->rtu[slice])) {

drivers/net/ethernet/ti/icssg/icssg_common.c

1764

ret = PTR_ERR(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

1765

prueth->rtu[slice] = NULL;

drivers/net/ethernet/ti/icssg/icssg_common.c

1766

return dev_err_probe(dev, ret, "unable to get RTU%d\n", slice);

drivers/net/ethernet/ti/icssg/icssg_common.c

1773

prueth->txpru[slice] = pru_rproc_get(np, idx, NULL);

drivers/net/ethernet/ti/icssg/icssg_common.c

1774

if (IS_ERR(prueth->txpru[slice])) {

drivers/net/ethernet/ti/icssg/icssg_common.c

1775

ret = PTR_ERR(prueth->txpru[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

1776

prueth->txpru[slice] = NULL;

drivers/net/ethernet/ti/icssg/icssg_common.c

1777

return dev_err_probe(dev, ret, "unable to get TX_PRU%d\n", slice);

drivers/net/ethernet/ti/icssg/icssg_common.c

1784

void prueth_put_cores(struct prueth *prueth, int slice)

drivers/net/ethernet/ti/icssg/icssg_common.c

1786

if (prueth->txpru[slice])

drivers/net/ethernet/ti/icssg/icssg_common.c

1787

pru_rproc_put(prueth->txpru[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

1789

if (prueth->rtu[slice])

drivers/net/ethernet/ti/icssg/icssg_common.c

1790

pru_rproc_put(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

1792

if (prueth->pru[slice])

drivers/net/ethernet/ti/icssg/icssg_common.c

1793

pru_rproc_put(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_common.c

398

int ret, slice, i;

drivers/net/ethernet/ti/icssg/icssg_common.c

401

slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_common.c

402

if (slice < 0)

drivers/net/ethernet/ti/icssg/icssg_common.c

403

return slice;

drivers/net/ethernet/ti/icssg/icssg_common.c

419

"tx%d-%d", slice, i);

drivers/net/ethernet/ti/icssg/icssg_common.c

501

int i, ret = 0, slice;

drivers/net/ethernet/ti/icssg/icssg_common.c

504

slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_common.c

505

if (slice < 0)

drivers/net/ethernet/ti/icssg/icssg_common.c

506

return slice;

drivers/net/ethernet/ti/icssg/icssg_common.c

509

snprintf(rx_chn->name, sizeof(rx_chn->name), "%s%d", name, slice);

drivers/net/ethernet/ti/icssg/icssg_config.c

143

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

149

txcfg_reg = (slice == ICSS_MII0) ? PRUSS_MII_RT_TXCFG0 :

drivers/net/ethernet/ti/icssg/icssg_config.c

151

pcnt_reg = (slice == ICSS_MII0) ? PRUSS_MII_RT_RX_PCNT0 :

drivers/net/ethernet/ti/icssg/icssg_config.c

159

if (emac->phy_if == PHY_INTERFACE_MODE_MII && slice == ICSS_MII0)

drivers/net/ethernet/ti/icssg/icssg_config.c

161

else if (emac->phy_if != PHY_INTERFACE_MODE_MII && slice == ICSS_MII1)

drivers/net/ethernet/ti/icssg/icssg_config.c

168

static void icssg_miig_queues_init(struct prueth *prueth, int slice)

drivers/net/ethernet/ti/icssg/icssg_config.c

177

if (slice)

drivers/net/ethernet/ti/icssg/icssg_config.c

185

queue = slice ? RECYCLE_Q_SLICE1 : RECYCLE_Q_SLICE0;

drivers/net/ethernet/ti/icssg/icssg_config.c

190

hwq_map[slice][i].queue);

drivers/net/ethernet/ti/icssg/icssg_config.c

202

mp = &hwq_map[slice][j];

drivers/net/ethernet/ti/icssg/icssg_config.c

229

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

252

icssg_mii_update_ipg(prueth->mii_rt, slice, ipg);

drivers/net/ethernet/ti/icssg/icssg_config.c

289

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

294

if (slice) {

drivers/net/ethernet/ti/icssg/icssg_config.c

376

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

381

if (slice) {

drivers/net/ethernet/ti/icssg/icssg_config.c

509

int icssg_config(struct prueth *prueth, struct prueth_emac *emac, int slice)

drivers/net/ethernet/ti/icssg/icssg_config.c

516

icssg_miig_queues_init(prueth, slice);

drivers/net/ethernet/ti/icssg/icssg_config.c

526

icssg_miig_set_interface_mode(prueth->miig_rt, slice, emac->phy_if);

drivers/net/ethernet/ti/icssg/icssg_config.c

535

pruss_cfg_gpimode(prueth->pruss, prueth->pru_id[slice],

drivers/net/ethernet/ti/icssg/icssg_config.c

543

pru_rproc_set_ctable(prueth->pru[slice], PRU_C28, 0x100 << 8);

drivers/net/ethernet/ti/icssg/icssg_config.c

544

pru_rproc_set_ctable(prueth->rtu[slice], PRU_C28, 0x100 << 8);

drivers/net/ethernet/ti/icssg/icssg_config.c

545

pru_rproc_set_ctable(prueth->txpru[slice], PRU_C28, 0x100 << 8);

drivers/net/ethernet/ti/icssg/icssg_config.c

668

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

671

addr = icssg_queue_pop(prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_config.c

680

icssg_queue_push(prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_config.c

683

2000, 20000000, false, prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_config.c

692

icssg_queue_push(prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_config.c

702

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

718

fdb_cmd->param |= (slice << 4);

drivers/net/ethernet/ti/icssg/icssg_config.c

845

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_config.c

854

fdb_cmd.param |= (slice << 4);

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

48

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

51

gig_en_mask = (slice == ICSS_MII0) ? RGMII_CFG_GIG_EN_MII0 :

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

57

inband_en_mask = (slice == ICSS_MII0) ? RGMII_CFG_INBAND_EN_MII0 :

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

63

full_duplex_mask = (slice == ICSS_MII0) ? RGMII_CFG_FULL_DUPLEX_MII0 :

drivers/net/ethernet/ti/icssg/icssg_prueth.c

152

int ret, slice;

drivers/net/ethernet/ti/icssg/icssg_prueth.c

163

for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {

drivers/net/ethernet/ti/icssg/icssg_prueth.c

164

ret = prueth_start(prueth->pru[slice], firmwares[slice].pru);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

166

dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

170

ret = prueth_start(prueth->rtu[slice], firmwares[slice].rtu);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

172

dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

173

rproc_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

177

ret = prueth_start(prueth->txpru[slice], firmwares[slice].txpru);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

179

dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

180

rproc_shutdown(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

181

rproc_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

189

while (--slice >= 0) {

drivers/net/ethernet/ti/icssg/icssg_prueth.c

190

prueth_shutdown(prueth->txpru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

191

prueth_shutdown(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

192

prueth_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

200

int slice;

drivers/net/ethernet/ti/icssg/icssg_prueth.c

202

for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {

drivers/net/ethernet/ti/icssg/icssg_prueth.c

203

prueth_shutdown(prueth->txpru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

204

prueth_shutdown(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

205

prueth_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

251

int slice;

drivers/net/ethernet/ti/icssg/icssg_prueth.c

268

for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {

drivers/net/ethernet/ti/icssg/icssg_prueth.c

269

emac = prueth->emac[slice];

drivers/net/ethernet/ti/icssg/icssg_prueth.c

272

ret = icssg_config(prueth, emac, slice);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

62

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

65

addr = icssg_queue_pop(prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_prueth.c

72

icssg_queue_push(prueth, slice == 0 ?

drivers/net/ethernet/ti/icssg/icssg_prueth.c

899

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

907

icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

908

icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);

drivers/net/ethernet/ti/icssg/icssg_prueth.c

962

icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

417

void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

419

void icssg_class_disable(struct regmap *miig_rt, int slice);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

420

void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti,

drivers/net/ethernet/ti/icssg/icssg_prueth.h

422

void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

423

void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice,

drivers/net/ethernet/ti/icssg/icssg_prueth.h

425

void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

430

int slice);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

508

int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1);

drivers/net/ethernet/ti/icssg/icssg_prueth.h

509

void prueth_put_cores(struct prueth *prueth, int slice);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

157

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

159

val = icssg_rgmii_get_speed(prueth->miig_rt, slice);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

164

val = icssg_rgmii_get_fullduplex(prueth->miig_rt, slice);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

415

int slice, ret;

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

419

slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

420

if (slice < 0) {

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

425

icssg_config_sr1(prueth, emac, slice);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

427

ret = rproc_set_firmware(prueth->pru[slice], firmwares[slice].pru);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

428

ret = rproc_boot(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

430

dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

434

ret = rproc_set_firmware(prueth->rtu[slice], firmwares[slice].rtu);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

435

ret = rproc_boot(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

437

dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

444

rproc_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

452

int slice;

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

456

slice = ICSS_SLICE0;

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

459

slice = ICSS_SLICE1;

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

467

rproc_shutdown(prueth->txpru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

468

rproc_shutdown(prueth->rtu[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

469

rproc_shutdown(prueth->pru[slice]);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

485

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

499

icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

501

icssg_class_default(prueth->miig_rt, slice, 0, true);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

55

int slice)

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

570

icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

723

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

726

icssg_class_promiscuous_sr1(prueth->miig_rt, slice);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

73

va = prueth->shram.va + slice * ICSSG_CONFIG_OFFSET_SLICE1;

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

731

icssg_class_default(prueth->miig_rt, slice, 1, true);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

735

icssg_class_default(prueth->miig_rt, slice, 0, true);

drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c

738

icssg_class_add_mcast_sr1(prueth->miig_rt, slice, ndev);

drivers/net/ethernet/ti/icssg/icssg_stats.c

22

int slice = prueth_emac_slice(emac);

drivers/net/ethernet/ti/icssg/icssg_stats.c

23

u32 base = stats_base[slice];

drivers/net/ethernet/ti/icssg/icssg_stats.c

38

base = stats_base[slice ^ 1];

drivers/net/ethernet/ti/icssg/icssg_stats.c

57

slice * sizeof(u32);

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

237

const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

240

slice->ref_pic_list0,

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

241

slice->num_ref_idx_l0_active_minus1 + 1,

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

248

const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

251

slice->ref_pic_list1,

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

252

slice->num_ref_idx_l1_active_minus1 + 1,

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

345

const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

389

cedrus_skip_bits(dev, slice->header_bit_size);

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

391

if (V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice))

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

394

if ((slice->slice_type == V4L2_H264_SLICE_TYPE_P) ||

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

395

(slice->slice_type == V4L2_H264_SLICE_TYPE_SP) ||

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

396

(slice->slice_type == V4L2_H264_SLICE_TYPE_B))

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

399

if (slice->slice_type == V4L2_H264_SLICE_TYPE_B)

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

408

reg |= (slice->num_ref_idx_l0_active_minus1 & 0x1f) << 10;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

409

reg |= (slice->num_ref_idx_l1_active_minus1 & 0x1f) << 5;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

440

reg |= ((slice->first_mb_in_slice % pic_width_in_mbs) & 0xff) << 24;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

441

reg |= (((slice->first_mb_in_slice / pic_width_in_mbs) *

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

444

reg |= (slice->slice_type & 0xf) << 8;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

445

reg |= slice->cabac_init_idc & 0x3;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

452

if (slice->flags & V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED)

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

458

reg |= (slice->num_ref_idx_l0_active_minus1 & 0x1f) << 24;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

459

reg |= (slice->num_ref_idx_l1_active_minus1 & 0x1f) << 16;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

460

reg |= (slice->disable_deblocking_filter_idc & 0x3) << 8;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

461

reg |= (slice->slice_alpha_c0_offset_div2 & 0xf) << 4;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

462

reg |= slice->slice_beta_offset_div2 & 0xf;

drivers/staging/media/sunxi/cedrus/cedrus_h264.c

468

reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

526

const struct v4l2_ctrl_vp8_frame *slice)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

530

if (V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) {

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

554

if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice))

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

559

if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice))

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

569

if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) {

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

594

static void cedrus_vp8_update_probs(const struct v4l2_ctrl_vp8_frame *slice,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

599

memcpy(&prob_table[0x1008], slice->entropy.y_mode_probs,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

600

sizeof(slice->entropy.y_mode_probs));

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

601

memcpy(&prob_table[0x1010], slice->entropy.uv_mode_probs,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

602

sizeof(slice->entropy.uv_mode_probs));

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

604

memcpy(&prob_table[0x1018], slice->segment.segment_probs,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

605

sizeof(slice->segment.segment_probs));

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

607

prob_table[0x101c] = slice->prob_skip_false;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

608

prob_table[0x101d] = slice->prob_intra;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

609

prob_table[0x101e] = slice->prob_last;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

610

prob_table[0x101f] = slice->prob_gf;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

612

memcpy(&prob_table[0x1020], slice->entropy.mv_probs[0],

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

614

memcpy(&prob_table[0x1040], slice->entropy.mv_probs[1],

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

621

slice->entropy.coeff_probs[i][j][k], 11);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

656

const struct v4l2_ctrl_vp8_frame *slice = run->vp8.frame_params;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

669

cedrus_vp8_update_probs(slice, ctx->codec.vp8.entropy_probs_buf);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

671

reg = slice->first_part_size * 8;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

674

header_size = V4L2_VP8_FRAME_IS_KEY_FRAME(slice) ? 10 : 3;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

676

reg = slice->first_part_size + header_size;

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

707

switch (slice->version) {

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

721

if (slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_UPDATE_MAP)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

723

if (!(slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_DELTA_VALUE_MODE))

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

725

if (slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_ENABLED)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

729

reg |= VE_VP8_PPS_SHARPNESS_LEVEL(slice->lf.sharpness_level);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

730

if (slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

732

reg |= VE_VP8_PPS_LOOP_FILTER_LEVEL(slice->lf.level);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

733

if (slice->lf.flags & V4L2_VP8_LF_ADJ_ENABLE)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

735

if (slice->lf.flags & V4L2_VP8_LF_DELTA_UPDATE)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

737

reg |= VE_VP8_PPS_TOKEN_PARTITION(ilog2(slice->num_dct_parts));

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

738

if (slice->flags & V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

741

if (slice->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

743

if (slice->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT)

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

748

if (!(slice->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME))

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

752

cedrus_read_header(dev, slice);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

760

reg |= VE_VP8_QP_INDEX_DELTA_UVAC(slice->quant.uv_ac_delta);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

761

reg |= VE_VP8_QP_INDEX_DELTA_UVDC(slice->quant.uv_dc_delta);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

762

reg |= VE_VP8_QP_INDEX_DELTA_Y2AC(slice->quant.y2_ac_delta);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

763

reg |= VE_VP8_QP_INDEX_DELTA_Y2DC(slice->quant.y2_dc_delta);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

764

reg |= VE_VP8_QP_INDEX_DELTA_Y1DC(slice->quant.y_dc_delta);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

765

reg |= VE_VP8_QP_INDEX_DELTA_BASE_QINDEX(slice->quant.y_ac_qi);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

769

reg |= VE_VP8_FSIZE_WIDTH(slice->width);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

770

reg |= VE_VP8_FSIZE_HEIGHT(slice->height);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

774

reg |= VE_VP8_PICSIZE_WIDTH(slice->width);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

775

reg |= VE_VP8_PICSIZE_HEIGHT(slice->height);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

779

reg |= VE_VP8_SEGMENT3(slice->segment.quant_update[3]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

780

reg |= VE_VP8_SEGMENT2(slice->segment.quant_update[2]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

781

reg |= VE_VP8_SEGMENT1(slice->segment.quant_update[1]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

782

reg |= VE_VP8_SEGMENT0(slice->segment.quant_update[0]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

786

reg |= VE_VP8_SEGMENT3(slice->segment.lf_update[3]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

787

reg |= VE_VP8_SEGMENT2(slice->segment.lf_update[2]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

788

reg |= VE_VP8_SEGMENT1(slice->segment.lf_update[1]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

789

reg |= VE_VP8_SEGMENT0(slice->segment.lf_update[0]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

793

reg |= VE_VP8_LF_DELTA3(slice->lf.ref_frm_delta[3]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

794

reg |= VE_VP8_LF_DELTA2(slice->lf.ref_frm_delta[2]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

795

reg |= VE_VP8_LF_DELTA1(slice->lf.ref_frm_delta[1]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

796

reg |= VE_VP8_LF_DELTA0(slice->lf.ref_frm_delta[0]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

800

reg |= VE_VP8_LF_DELTA3(slice->lf.mb_mode_delta[3]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

801

reg |= VE_VP8_LF_DELTA2(slice->lf.mb_mode_delta[2]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

802

reg |= VE_VP8_LF_DELTA1(slice->lf.mb_mode_delta[1]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

803

reg |= VE_VP8_LF_DELTA0(slice->lf.mb_mode_delta[0]);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

811

cedrus_write_ref_buf_addr(ctx, cap_q, slice->last_frame_ts,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

813

cedrus_write_ref_buf_addr(ctx, cap_q, slice->golden_frame_ts,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

815

cedrus_write_ref_buf_addr(ctx, cap_q, slice->alt_frame_ts,

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

822

if (slice->lf.level) {

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

824

!!(slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

826

!V4L2_VP8_FRAME_IS_KEY_FRAME(slice);

drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

828

slice->lf.sharpness_level;

drivers/usb/dwc2/hcd_queue.c

523

int slice;

drivers/usb/dwc2/hcd_queue.c

540

slice = pmap_schedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,

drivers/usb/dwc2/hcd_queue.c

544

if (slice < 0)

drivers/usb/dwc2/hcd_queue.c

545

return slice;

drivers/usb/dwc2/hcd_queue.c

547

qh->ls_start_schedule_slice = slice;

fs/efs/super.c

150

int pt_type, slice = -1;

fs/efs/super.c

207

slice = i;

fs/efs/super.c

211

if (slice == -1) {

fs/efs/super.c

215

pr_info("using slice %d (type %s, offset 0x%x)\n", slice,

fs/erofs/xattr.c

120

unsigned int slice, processed;

fs/erofs/xattr.c

123

for (processed = 0; processed < len; processed += slice) {

fs/erofs/xattr.c

128

slice = min_t(unsigned int, sb->s_blocksize -

fs/erofs/xattr.c

130

memcpy(it->buffer + it->buffer_ofs, it->kaddr, slice);

fs/erofs/xattr.c

131

it->buffer_ofs += slice;

fs/erofs/xattr.c

132

it->pos += slice;

fs/erofs/xattr.c

192

unsigned int slice, processed, value_sz;

fs/erofs/xattr.c

225

for (processed = 0; processed < entry.e_name_len; processed += slice) {

fs/erofs/xattr.c

230

slice = min_t(unsigned int,

fs/erofs/xattr.c

234

it->kaddr, slice))

fs/erofs/xattr.c

236

it->pos += slice;

fs/netfs/buffered_read.c

225

ssize_t slice;

fs/netfs/buffered_read.c

295

slice = netfs_prepare_read_iterator(subreq, ractl);

fs/netfs/buffered_read.c

296

if (slice < 0) {

fs/netfs/buffered_read.c

297

ret = slice;

fs/netfs/buffered_read.c

305

size -= slice;

fs/netfs/buffered_read.c

306

start += slice;

fs/netfs/direct_read.c

57

ssize_t slice;

fs/netfs/direct_read.c

93

slice = subreq->len;

fs/netfs/direct_read.c

94

size -= slice;

fs/netfs/direct_read.c

95

start += slice;

fs/netfs/direct_read.c

96

rreq->submitted += slice;

fs/nfs/blocklayout/blocklayout.h

74

} slice;

fs/nfs/blocklayout/dev.c

159

p = xdr_decode_hyper(p, &b->slice.start);

fs/nfs/blocklayout/dev.c

160

p = xdr_decode_hyper(p, &b->slice.len);

fs/nfs/blocklayout/dev.c

161

b->slice.volume = be32_to_cpup(p++);

fs/nfs/blocklayout/dev.c

447

ret = bl_parse_deviceid(server, d, volumes, v->slice.volume, gfp_mask);

fs/nfs/blocklayout/dev.c

451

d->disk_offset = v->slice.start;

fs/nfs/blocklayout/dev.c

452

d->len = v->slice.len;

include/linux/rseq_entry.h

100

if (likely(!current->rseq.slice.state.granted))

include/linux/rseq_entry.h

108

if (IS_ENABLED(CONFIG_RSEQ_STATS) && t->rseq.slice.state.granted)

include/linux/rseq_entry.h

110

t->rseq.slice.state.granted = false;

include/linux/rseq_entry.h

124

state = curr->rseq.slice.state;

include/linux/rseq_entry.h

161

curr->rseq.slice.state.granted = true;

include/linux/rseq_entry.h

163

curr->rseq.slice.expires = data_race(rseq_slice_ext_nsecs) + ktime_get_mono_fast_ns();

include/linux/rseq_types.h

117

struct rseq_slice slice;

include/linux/sched.h

599

u64 slice;

include/linux/sched/ext.h

199

u64 slice;

include/uapi/linux/v4l2-controls.h

1524

#define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \

include/uapi/linux/v4l2-controls.h

1526

((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \

include/uapi/linux/v4l2-controls.h

1527

(slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \

include/uapi/linux/v4l2-controls.h

1529

(slice)->slice_type == V4L2_H264_SLICE_TYPE_B))

init/init_task.c

141

.slice = SCX_SLICE_DFL,

kernel/bpf/helpers.c

3063

void* slice;

kernel/bpf/helpers.c

3066

slice = bpf_dynptr_slice_rdwr(p, offset, NULL, size);

kernel/bpf/helpers.c

3067

if (likely(slice)) {

kernel/bpf/helpers.c

3068

memset(slice, val, size);

kernel/rseq.c

500

current->rseq.slice.state.enabled = !!(rseqfl & RSEQ_CS_FLAG_SLICE_EXT_ENABLED);

kernel/rseq.c

545

if (st->cookie == current && current->rseq.slice.state.granted) {

kernel/rseq.c

566

if ((unlikely(curr->rseq.slice.expires < ktime_get_mono_fast_ns()))) {

kernel/rseq.c

577

hrtimer_start(&st->timer, curr->rseq.slice.expires, HRTIMER_MODE_ABS_PINNED_HARD);

kernel/rseq.c

650

struct rseq_slice_ctrl ctrl = { .granted = curr->rseq.slice.state.granted };

kernel/rseq.c

683

curr->rseq.slice.yielded = 1;

kernel/rseq.c

693

curr->rseq.slice.state.granted = false;

kernel/rseq.c

704

return current->rseq.slice.state.enabled ? PR_RSEQ_SLICE_EXT_ENABLE : 0;

kernel/rseq.c

718

if (enable == !!current->rseq.slice.state.enabled)

kernel/rseq.c

724

if (current->rseq.slice.state.enabled)

kernel/rseq.c

738

current->rseq.slice.state.enabled = enable;

kernel/rseq.c

764

int yielded = !!current->rseq.slice.yielded;

kernel/rseq.c

766

current->rseq.slice.yielded = 0;

kernel/sched/core.c

4658

p->se.slice = sysctl_sched_base_slice;

kernel/sched/core.c

8759

init_task.se.slice = sysctl_sched_base_slice,

kernel/sched/debug.c

1354

P(se.slice);

kernel/sched/debug.c

845

SPLIT_NS(p->se.slice),

kernel/sched/ext.c

1009

rq->curr->scx.slice = 0;

kernel/sched/ext.c

1641

p->scx.slice = 0;

kernel/sched/ext.c

2213

if (prev_on_rq && prev->scx.slice && !scx_rq_bypassing(rq)) {

kernel/sched/ext.c

2253

if (prev_on_rq && prev->scx.slice) {

kernel/sched/ext.c

2350

if ((p->scx.slice == SCX_SLICE_INF) !=

kernel/sched/ext.c

2352

if (p->scx.slice == SCX_SLICE_INF)

kernel/sched/ext.c

2444

if (p->scx.slice && !scx_rq_bypassing(rq)) {

kernel/sched/ext.c

2570

if (!p->scx.slice)

kernel/sched/ext.c

2577

if (unlikely(!p->scx.slice)) {

kernel/sched/ext.c

2880

curr->scx.slice = 0;

kernel/sched/ext.c

2886

if (!curr->scx.slice)

kernel/sched/ext.c

3085

scx->slice = READ_ONCE(scx_slice_dfl);

kernel/sched/ext.c

4683

p->scx.dsq_vtime, p->scx.slice, p->scx.weight);

kernel/sched/ext.c

498

u64 slice;

kernel/sched/ext.c

5268

p->scx.slice = READ_ONCE(scx_slice_dfl);

kernel/sched/ext.c

5391

if (off >= offsetof(struct task_struct, scx.slice) &&

kernel/sched/ext.c

5392

off + size <= offsetofend(struct task_struct, scx.slice))

kernel/sched/ext.c

5684

rq->curr->scx.slice = 0;

kernel/sched/ext.c

5967

u64 slice, u64 enq_flags)

kernel/sched/ext.c

5979

if (slice)

kernel/sched/ext.c

5980

p->scx.slice = slice;

kernel/sched/ext.c

5982

p->scx.slice = p->scx.slice ?: 1;

kernel/sched/ext.c

5993

u64 slice, u64 enq_flags)

kernel/sched/ext.c

5995

scx_bpf_dsq_insert___v2(p, dsq_id, slice, enq_flags);

kernel/sched/ext.c

5999

u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags)

kernel/sched/ext.c

6004

if (slice)

kernel/sched/ext.c

6005

p->scx.slice = slice;

kernel/sched/ext.c

6007

p->scx.slice = p->scx.slice ?: 1;

kernel/sched/ext.c

6019

u64 slice;

kernel/sched/ext.c

6066

return scx_dsq_insert_vtime(sch, p, args->dsq_id, args->slice,

kernel/sched/ext.c

6074

u64 slice, u64 vtime, u64 enq_flags)

kernel/sched/ext.c

6084

scx_dsq_insert_vtime(sch, p, dsq_id, slice, vtime, enq_flags);

kernel/sched/ext.c

6168

p->scx.slice = kit->slice;

kernel/sched/ext.c

6298

u64 slice)

kernel/sched/ext.c

6302

kit->slice = slice;

kernel/sched/ext.c

6553

__bpf_kfunc bool scx_bpf_task_set_slice(struct task_struct *p, u64 slice)

kernel/sched/ext.c

6555

p->scx.slice = slice;

kernel/sched/ext.c

957

if (curr->scx.slice != SCX_SLICE_INF) {

kernel/sched/ext.c

958

curr->scx.slice -= min_t(u64, curr->scx.slice, delta_exec);

kernel/sched/ext.c

959

if (!curr->scx.slice)

kernel/sched/ext.c

989

p->scx.slice = READ_ONCE(scx_slice_dfl);

kernel/sched/fair.c

1128

se->slice = sysctl_sched_base_slice;

kernel/sched/fair.c

1133

se->deadline = se->vruntime + calc_delta_fair(se->slice, se);

kernel/sched/fair.c

13135

u64 slice = se->slice;

kernel/sched/fair.c

13137

return (rtime * min_nr_tasks > slice);

kernel/sched/fair.c

13943

rr_interval = NS_TO_JIFFIES(se->slice);

kernel/sched/fair.c

5155

se->slice = clamp_t(u64, attr->sched_runtime,

kernel/sched/fair.c

5160

se->slice = sysctl_sched_base_slice;

kernel/sched/fair.c

5171

se->slice = sysctl_sched_base_slice;

kernel/sched/fair.c

5172

vslice = calc_delta_fair(se->slice, se);

kernel/sched/fair.c

6398

u64 runtime = 0, slice = sched_cfs_bandwidth_slice();

kernel/sched/fair.c

6410

if (cfs_b->quota != RUNTIME_INF && cfs_b->runtime > slice)

kernel/sched/fair.c

6813

u64 slice = se->slice;

kernel/sched/fair.c

6814

s64 delta = slice - ran;

kernel/sched/fair.c

6949

u64 slice = 0;

kernel/sched/fair.c

6992

if (slice) {

kernel/sched/fair.c

6993

se->slice = slice;

kernel/sched/fair.c

6997

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

7016

se->slice = slice;

kernel/sched/fair.c

7019

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

7077

u64 slice = 0;

kernel/sched/fair.c

7094

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

7110

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

7133

se->slice = slice;

kernel/sched/fair.c

7136

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

825

min_slice = curr->slice;

kernel/sched/fair.c

840

max_slice = curr->slice;

kernel/sched/fair.c

8884

if (sched_feat(PREEMPT_SHORT) && (pse->slice < se->slice)) {

kernel/sched/fair.c

895

se->min_slice = se->slice;

kernel/sched/fair.c

899

se->max_slice = se->slice;

kernel/sched/fair.c

918

se->min_slice = se->slice;

kernel/sched/fair.c

960

u64 slice = normalized_sysctl_sched_base_slice;

kernel/sched/fair.c

964

slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

966

slice = min(slice, se->slice);

kernel/sched/fair.c

967

if (slice != se->slice)

kernel/sched/fair.c

968

vprot = min_vruntime(vprot, se->vruntime + calc_delta_fair(slice, se));

kernel/sched/fair.c

975

u64 slice = cfs_rq_min_slice(cfs_rq);

kernel/sched/fair.c

977

se->vprot = min_vruntime(se->vprot, se->vruntime + calc_delta_fair(slice, se));

kernel/sched/syscalls.c

593

(attr->sched_runtime != p->se.slice)))

kernel/sched/syscalls.c

735

attr.sched_runtime = p->se.slice;

kernel/sched/syscalls.c

922

attr->sched_runtime = p->se.slice;

lib/zstd/compress/zstd_preSplit.c

144

static void removeEvents(Fingerprint* acc, const Fingerprint* slice)

lib/zstd/compress/zstd_preSplit.c

148

assert(acc->events[n] >= slice->events[n]);

lib/zstd/compress/zstd_preSplit.c

149

acc->events[n] -= slice->events[n];

lib/zstd/compress/zstd_preSplit.c

151

acc->nbEvents -= slice->nbEvents;

sound/pci/au88x0/au88x0_a3d.c

102

a3d_addrB(a->slice, a->source, A3D_B_A12Current));

sound/pci/au88x0/au88x0_a3d.c

105

a3d_addrA(a->slice, a->source, A3D_A_B01Current));

sound/pci/au88x0/au88x0_a3d.c

108

a3d_addrB(a->slice, a->source, A3D_B_B01Current));

sound/pci/au88x0/au88x0_a3d.c

111

a3d_addrA(a->slice, a->source, A3D_A_B2Current));

sound/pci/au88x0/au88x0_a3d.c

131

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

144

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

157

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

166

a3d_addrA(a->slice, a->source, A3D_A_HrtfOutL), left);

sound/pci/au88x0/au88x0_a3d.c

168

a3d_addrA(a->slice, a->source, A3D_A_HrtfOutR), right);

sound/pci/au88x0/au88x0_a3d.c

180

a3d_addrA(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

185

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

197

a3d_addrA(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

202

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

214

a3d_addrA(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

219

a3d_addrB(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

228

a3d_addrA(a->slice, a->source, A3D_A_HrtfOutL));

sound/pci/au88x0/au88x0_a3d.c

231

a3d_addrA(a->slice, a->source, A3D_A_HrtfOutR));

sound/pci/au88x0/au88x0_a3d.c

254

a3d_addrB(a->slice, a->source, A3D_B_ITDTarget),

sound/pci/au88x0/au88x0_a3d.c

26

a3d_addrA(a->slice, a->source, A3D_A_HrtfTrackTC), HrtfTrack);

sound/pci/au88x0/au88x0_a3d.c

272

a3d_addrB(a->slice, a->source, A3D_B_ITDCurrent),

sound/pci/au88x0/au88x0_a3d.c

28

a3d_addrA(a->slice, a->source, A3D_A_ITDTrackTC), ItdTrack);

sound/pci/au88x0/au88x0_a3d.c

284

a3d_addrA(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

294

a3d_addrA(a->slice, a->source, A3D_A_ITDTarget));

sound/pci/au88x0/au88x0_a3d.c

297

a3d_addrB(a->slice, a->source, A3D_B_ITDTarget));

sound/pci/au88x0/au88x0_a3d.c

30

a3d_addrA(a->slice, a->source, A3D_A_GainTrackTC), GTrack);

sound/pci/au88x0/au88x0_a3d.c

306

a3d_addrA(a->slice, a->source, A3D_A_ITDCurrent));

sound/pci/au88x0/au88x0_a3d.c

309

a3d_addrB(a->slice, a->source, A3D_B_ITDCurrent));

sound/pci/au88x0/au88x0_a3d.c

32

a3d_addrA(a->slice, a->source, A3D_A_CoeffTrackTC), CTrack);

sound/pci/au88x0/au88x0_a3d.c

320

a3d_addrA(a->slice, a->source,

sound/pci/au88x0/au88x0_a3d.c

331

a3d_addrB(a->slice, a->source, A3D_B_GainTarget),

sound/pci/au88x0/au88x0_a3d.c

339

a3d_addrB(a->slice, a->source, A3D_B_GainCurrent),

sound/pci/au88x0/au88x0_a3d.c

349

a3d_addrA(a->slice, a->source, A3D_A_GainTarget));

sound/pci/au88x0/au88x0_a3d.c

352

a3d_addrB(a->slice, a->source, A3D_B_GainTarget));

sound/pci/au88x0/au88x0_a3d.c

360

a3d_addrA(a->slice, a->source, A3D_A_GainCurrent));

sound/pci/au88x0/au88x0_a3d.c

363

a3d_addrB(a->slice, a->source, A3D_B_GainCurrent));

sound/pci/au88x0/au88x0_a3d.c

382

hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd), esp0);

sound/pci/au88x0/au88x0_a3d.c

389

hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd),

sound/pci/au88x0/au88x0_a3d.c

397

hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd),

sound/pci/au88x0/au88x0_a3d.c

404

hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd), ctrl);

sound/pci/au88x0/au88x0_a3d.c

410

hwwrite(vortex->mmio, A3D_SLICE_Pointers + ((a->slice) << 0xd), ptr);

sound/pci/au88x0/au88x0_a3d.c

417

*sr = ((hwread(vortex->mmio, A3D_SLICE_Control + (a->slice << 0xd))

sound/pci/au88x0/au88x0_a3d.c

425

*ctrl = hwread(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd));

sound/pci/au88x0/au88x0_a3d.c

431

*ptr = hwread(vortex->mmio, A3D_SLICE_Pointers + ((a->slice) << 0xd));

sound/pci/au88x0/au88x0_a3d.c

443

((((a->slice) << 0xb) + i) << 2), 0);

sound/pci/au88x0/au88x0_a3d.c

447

((((a->slice) << 0xb) + i) << 2), 0);

sound/pci/au88x0/au88x0_a3d.c

488

var = a->slice;

sound/pci/au88x0/au88x0_a3d.c

491

a->slice = i;

sound/pci/au88x0/au88x0_a3d.c

496

a->slice = var;

sound/pci/au88x0/au88x0_a3d.c

52

a3d_addrB(a->slice, a->source, A3D_B_A21Target),

sound/pci/au88x0/au88x0_a3d.c

529

a3d_addrS(a->slice, A3D_SLICE_VDBDest) + (a->source << 2), 0);

sound/pci/au88x0/au88x0_a3d.c

531

a3d_addrS(a->slice,

sound/pci/au88x0/au88x0_a3d.c

542

static void vortex_A3dSourceHw_Initialize(vortex_t * v, int source, int slice)

sound/pci/au88x0/au88x0_a3d.c

544

a3dsrc_t *a3dsrc = &(v->a3d[source + (slice * 4)]);

sound/pci/au88x0/au88x0_a3d.c

549

a3dsrc->slice = slice; /* slice */

sound/pci/au88x0/au88x0_a3d.c

55

a3d_addrB(a->slice, a->source, A3D_B_B10Target),

sound/pci/au88x0/au88x0_a3d.c

58

a3d_addrB(a->slice, a->source, A3D_B_B2Target), c);

sound/pci/au88x0/au88x0_a3d.c

67

a3d_addrB(a->slice, a->source, A3D_B_A12Current),

sound/pci/au88x0/au88x0_a3d.c

70

a3d_addrB(a->slice, a->source, A3D_B_B01Current),

sound/pci/au88x0/au88x0_a3d.c

73

a3d_addrB(a->slice, a->source, A3D_B_B2Current), c);

sound/pci/au88x0/au88x0_a3d.c

80

hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_x1), x1);

sound/pci/au88x0/au88x0_a3d.c

81

hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_x2), x2);

sound/pci/au88x0/au88x0_a3d.c

82

hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_y1), y1);

sound/pci/au88x0/au88x0_a3d.c

83

hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_y2), y2);

sound/pci/au88x0/au88x0_a3d.c

99

a3d_addrA(a->slice, a->source, A3D_A_A12Current));

sound/pci/au88x0/au88x0_a3d.h

106

#define a3d_addrA(slice,source,reg) (((slice)<<0xd)+((source)*0x3A4)+(reg))

sound/pci/au88x0/au88x0_a3d.h

107

#define a3d_addrB(slice,source,reg) (((slice)<<0xd)+((source)*0x2C8)+(reg))

sound/pci/au88x0/au88x0_a3d.h

108

#define a3d_addrS(slice,reg) (((slice)<<0xd)+(reg))

sound/pci/au88x0/au88x0_a3d.h

38

unsigned int slice; /* this_08 */

tools/sched_ext/include/scx/compat.bpf.h

237

void scx_bpf_dispatch_vtime___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

238

void scx_bpf_dsq_insert_vtime___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

281

scx_bpf_dsq_insert_vtime(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime,

tools/sched_ext/include/scx/compat.bpf.h

287

.slice = slice,

tools/sched_ext/include/scx/compat.bpf.h

294

scx_bpf_dsq_insert_vtime___compat(p, dsq_id, slice, vtime,

tools/sched_ext/include/scx/compat.bpf.h

298

scx_bpf_dispatch_vtime___compat(p, dsq_id, slice, vtime,

tools/sched_ext/include/scx/compat.bpf.h

313

bool scx_bpf_dsq_insert___v2___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

314

void scx_bpf_dsq_insert___v1(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

315

void scx_bpf_dispatch___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

318

scx_bpf_dsq_insert(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags)

tools/sched_ext/include/scx/compat.bpf.h

321

return scx_bpf_dsq_insert___v2___compat(p, dsq_id, slice, enq_flags);

tools/sched_ext/include/scx/compat.bpf.h

323

scx_bpf_dsq_insert___v1(p, dsq_id, slice, enq_flags);

tools/sched_ext/include/scx/compat.bpf.h

326

scx_bpf_dispatch___compat(p, dsq_id, slice, enq_flags);

tools/sched_ext/include/scx/compat.bpf.h

33

void scx_bpf_dsq_move_set_slice___new(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

336

bool scx_bpf_task_set_slice___new(struct task_struct *p, u64 slice) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

339

static inline void scx_bpf_task_set_slice(struct task_struct *p, u64 slice)

tools/sched_ext/include/scx/compat.bpf.h

342

scx_bpf_task_set_slice___new(p, slice);

tools/sched_ext/include/scx/compat.bpf.h

344

p->scx.slice = slice;

tools/sched_ext/include/scx/compat.bpf.h

39

void scx_bpf_dispatch_from_dsq_set_slice___old(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;

tools/sched_ext/include/scx/compat.bpf.h

49

#define scx_bpf_dsq_move_set_slice(it__iter, slice) \

tools/sched_ext/include/scx/compat.bpf.h

51

scx_bpf_dsq_move_set_slice___new((it__iter), (slice)) : \

tools/sched_ext/include/scx/compat.bpf.h

53

scx_bpf_dispatch_from_dsq_set_slice___old((it__iter), (slice)) : \

tools/sched_ext/scx_flatcg.bpf.c

556

(SCX_SLICE_DFL - p->scx.slice) * 100 / p->scx.weight;

tools/sched_ext/scx_simple.bpf.c

124

p->scx.dsq_vtime += (SCX_SLICE_DFL - p->scx.slice) * 100 / p->scx.weight;

tools/testing/selftests/bpf/progs/dynptr_fail.c

1604

__u32 *slice;

tools/testing/selftests/bpf/progs/dynptr_fail.c

1609

slice = bpf_dynptr_data(&ptr, 0, sizeof(__u32));

tools/testing/selftests/bpf/progs/dynptr_fail.c

1610

if (!slice)

tools/testing/selftests/bpf/progs/dynptr_fail.c

1616

*slice = 1;

tools/testing/selftests/sched_ext/select_cpu_vtime.bpf.c

69

p->scx.dsq_vtime += (SCX_SLICE_DFL - p->scx.slice) * 100 / p->scx.weight;