sdhci_readb
reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
reg = sdhci_readb(host, SDHCI_SOFTWARE_RESET);
ret = read_poll_timeout_atomic(sdhci_readb, reg, !(reg & mask),
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
count = sdhci_readb(host, SDHCI_TIMEOUT_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
mc1r = sdhci_readb(host, SDMMC_MC1R);
val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R);
val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R);
extra = sdhci_readb(host, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
ret = read_poll_timeout(sdhci_readb, status, status & DLL_LOCK_STS, 100, 1000000,
status = sdhci_readb(host, PHY_DLL_STATUS_R);
val = sdhci_readb(host, PHY_SDCLKDL_CNFG_R);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
regs[idx] = sdhci_readb(host, restore_data[idx].reg);
value = sdhci_readb(host, MSHC2_EMMC_CTRL);
value = sdhci_readb(host, MSHC2_EMMC_CTRL) &
while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) &&
while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) &&
if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)
u8 reg = sdhci_readb(slot->host, SDHCI_POWER_CONTROL);
reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
if (read_poll_timeout_atomic(sdhci_readb, rst, !(rst & mask),
value = sdhci_readb(host, SDHCI_POWER_CONTROL);
value = sdhci_readb(host, SDHCI_POWER_CONTROL);
scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL);
ret = read_poll_timeout(sdhci_readb, scratch8, !(scratch8 & BIT(0)),
scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
sdhci_readb(host, SDHCI_ADMA_ERROR));
sdhci_readb(host, SDHCI_UHS2_DEV_SELECT));
sdhci_readb(host, SDHCI_UHS2_DEV_INT_CODE));
sdhci_readb(host, SDHCI_UHS2_CMD_PACKET + i));
resp = sdhci_readb(host, SDHCI_UHS2_RESPONSE + 2);
cmd->uhs2_cmd->uhs2_resp[i] = sdhci_readb(host, SDHCI_UHS2_RESPONSE + i);
(sdhci_readb(host,
(sdhci_readb(host,
(sdhci_readb(host,
sdhci_readb(host, SDHCI_UHS2_RESPONSE + i + 3);
if (!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask))
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL);
val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
sdhci_readb(host, SDHCI_HOST_CONTROL));
sdhci_readb(host, SDHCI_POWER_CONTROL),
sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);