reg_update_bits
int (*reg_update_bits)(void *context, unsigned int reg,
if (regmap_volatile(map, reg) && map->reg_update_bits) {
ret = map->reg_update_bits(map->bus_context, reg, mask, val);
if (config->reg_update_bits)
map->reg_update_bits = config->reg_update_bits;
map->reg_update_bits = config->reg_update_bits;
map->reg_update_bits = bus->reg_update_bits;
map->reg_update_bits = bus->reg_update_bits;
.reg_update_bits = qca8k_regmap_update_bits,
reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_ALPHA_MASK,
reg_update_bits(d->regs, DMA2D_BGOR_REG, BGOR_LO_MASK,
reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_CM_MASK,
reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_AM_MASK,
reg_update_bits(d->regs, DMA2D_BGPFCCR_REG, BGPFCCR_ALPHA_MASK,
reg_update_bits(d->regs, DMA2D_CR_REG, CR_START, CR_START);
reg_update_bits(d->regs, DMA2D_CR_REG, CR_MODE_MASK,
reg_update_bits(d->regs, DMA2D_CR_REG, CR_CEIE, CR_CEIE);
reg_update_bits(d->regs, DMA2D_CR_REG, CR_CTCIE, CR_CTCIE);
reg_update_bits(d->regs, DMA2D_CR_REG, CR_CAEIE, CR_CAEIE);
reg_update_bits(d->regs, DMA2D_CR_REG, CR_TCIE, CR_TCIE);
reg_update_bits(d->regs, DMA2D_CR_REG, CR_TEIE, CR_TEIE);
reg_update_bits(d->regs, DMA2D_OPFCCR_REG, OPFCCR_CM_MASK,
reg_update_bits(d->regs, DMA2D_OOR_REG, OOR_LO_MASK,
reg_update_bits(d->regs, DMA2D_FGOR_REG, FGOR_LO_MASK,
reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_CM_MASK,
reg_update_bits(d->regs, DMA2D_FGPFCCR_REG, FGPFCCR_AM_MASK,
.reg_update_bits = sec_pmic_acpm_bus_reg_update_bits,
.reg_update_bits = mcp251xfd_regmap_nocrc_update_bits,
.reg_update_bits = qca8k_regmap_update_bits,
.reg_update_bits = regmap_encx24j600_reg_update_bits,
.reg_update_bits = tensor_sec_update_bits,
int (*reg_update_bits)(void *context, unsigned int reg,
regmap_hw_reg_update_bits reg_update_bits;