drivers/gpu/drm/amd/amdgpu/amdgpu.h

614

enum amdgpu_reg_state reg_state, void *buf,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

295

static const BIN_ATTR(reg_state, 0444, amdgpu_sysfs_reg_state_get, NULL,

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

868

int reg_state)

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

882

switch (reg_state) {

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

936

enum amdgpu_reg_state reg_state, void *buf,

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

941

switch (reg_state) {

drivers/gpu/drm/amd/amdgpu/soc15.h

123

enum amdgpu_reg_state reg_state, void *buf,

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

481

void hubp3_read_reg_state(struct hubp *hubp, struct dcn_hubp_reg_state *reg_state)

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

485

reg_state->hubp_cntl = REG_READ(DCHUBP_CNTL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

486

reg_state->mall_config = REG_READ(DCHUBP_MALL_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

487

reg_state->mall_sub_vp = REG_READ(DCHUBP_MALL_SUB_VP);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

488

reg_state->hubp_req_size_config = REG_READ(DCHUBP_REQ_SIZE_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

489

reg_state->hubp_req_size_config_c = REG_READ(DCHUBP_REQ_SIZE_CONFIG_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

490

reg_state->vmpg_config = REG_READ(DCHUBP_VMPG_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

491

reg_state->addr_config = REG_READ(DCSURF_ADDR_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

492

reg_state->pri_viewport_dimension = REG_READ(DCSURF_PRI_VIEWPORT_DIMENSION);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

493

reg_state->pri_viewport_dimension_c = REG_READ(DCSURF_PRI_VIEWPORT_DIMENSION_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

494

reg_state->pri_viewport_start = REG_READ(DCSURF_PRI_VIEWPORT_START);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

495

reg_state->pri_viewport_start_c = REG_READ(DCSURF_PRI_VIEWPORT_START_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

496

reg_state->sec_viewport_dimension = REG_READ(DCSURF_SEC_VIEWPORT_DIMENSION);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

497

reg_state->sec_viewport_dimension_c = REG_READ(DCSURF_SEC_VIEWPORT_DIMENSION_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

498

reg_state->sec_viewport_start = REG_READ(DCSURF_SEC_VIEWPORT_START);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

499

reg_state->sec_viewport_start_c = REG_READ(DCSURF_SEC_VIEWPORT_START_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

500

reg_state->surface_config = REG_READ(DCSURF_SURFACE_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

501

reg_state->tiling_config = REG_READ(DCSURF_TILING_CONFIG);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

502

reg_state->clk_cntl = REG_READ(HUBP_CLK_CNTL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

503

reg_state->mall_status = REG_READ(HUBP_MALL_STATUS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

504

reg_state->measure_win_ctrl_dcfclk = REG_READ(HUBP_MEASURE_WIN_CTRL_DCFCLK);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

505

reg_state->measure_win_ctrl_dppclk = REG_READ(HUBP_MEASURE_WIN_CTRL_DPPCLK);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

507

reg_state->blank_offset_0 = REG_READ(BLANK_OFFSET_0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

508

reg_state->blank_offset_1 = REG_READ(BLANK_OFFSET_1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

509

reg_state->cursor_settings = REG_READ(CURSOR_SETTINGS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

510

reg_state->dcn_cur0_ttu_cntl0 = REG_READ(DCN_CUR0_TTU_CNTL0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

511

reg_state->dcn_cur0_ttu_cntl1 = REG_READ(DCN_CUR0_TTU_CNTL1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

512

reg_state->dcn_cur1_ttu_cntl0 = REG_READ(DCN_CUR1_TTU_CNTL0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

513

reg_state->dcn_cur1_ttu_cntl1 = REG_READ(DCN_CUR1_TTU_CNTL1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

514

reg_state->dcn_dmdat_vm_cntl = REG_READ(DCN_DMDATA_VM_CNTL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

515

reg_state->dcn_expansion_mode = REG_READ(DCN_EXPANSION_MODE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

516

reg_state->dcn_global_ttu_cntl = REG_READ(DCN_GLOBAL_TTU_CNTL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

517

reg_state->dcn_surf0_ttu_cntl0 = REG_READ(DCN_SURF0_TTU_CNTL0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

518

reg_state->dcn_surf0_ttu_cntl1 = REG_READ(DCN_SURF0_TTU_CNTL1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

519

reg_state->dcn_surf1_ttu_cntl0 = REG_READ(DCN_SURF1_TTU_CNTL0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

520

reg_state->dcn_surf1_ttu_cntl1 = REG_READ(DCN_SURF1_TTU_CNTL1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

521

reg_state->dcn_ttu_qos_wm = REG_READ(DCN_TTU_QOS_WM);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

522

reg_state->dcn_vm_mx_l1_tlb_cntl = REG_READ(DCN_VM_MX_L1_TLB_CNTL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

523

reg_state->dcn_vm_system_aperture_high_addr = REG_READ(DCN_VM_SYSTEM_APERTURE_HIGH_ADDR);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

524

reg_state->dcn_vm_system_aperture_low_addr = REG_READ(DCN_VM_SYSTEM_APERTURE_LOW_ADDR);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

525

reg_state->dcsurf_flip_control = REG_READ(DCSURF_FLIP_CONTROL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

526

reg_state->dcsurf_flip_control2 = REG_READ(DCSURF_FLIP_CONTROL2);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

527

reg_state->dcsurf_primary_meta_surface_address = REG_READ(DCSURF_PRIMARY_META_SURFACE_ADDRESS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

528

reg_state->dcsurf_primary_meta_surface_address_c = REG_READ(DCSURF_PRIMARY_META_SURFACE_ADDRESS_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

529

reg_state->dcsurf_primary_meta_surface_address_high = REG_READ(DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

530

reg_state->dcsurf_primary_meta_surface_address_high_c = REG_READ(DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

531

reg_state->dcsurf_primary_surface_address = REG_READ(DCSURF_PRIMARY_SURFACE_ADDRESS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

532

reg_state->dcsurf_primary_surface_address_c = REG_READ(DCSURF_PRIMARY_SURFACE_ADDRESS_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

533

reg_state->dcsurf_primary_surface_address_high = REG_READ(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

534

reg_state->dcsurf_primary_surface_address_high_c = REG_READ(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

535

reg_state->dcsurf_secondary_meta_surface_address = REG_READ(DCSURF_SECONDARY_META_SURFACE_ADDRESS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

536

reg_state->dcsurf_secondary_meta_surface_address_c = REG_READ(DCSURF_SECONDARY_META_SURFACE_ADDRESS_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

537

reg_state->dcsurf_secondary_meta_surface_address_high = REG_READ(DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

538

reg_state->dcsurf_secondary_meta_surface_address_high_c = REG_READ(DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

539

reg_state->dcsurf_secondary_surface_address = REG_READ(DCSURF_SECONDARY_SURFACE_ADDRESS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

540

reg_state->dcsurf_secondary_surface_address_c = REG_READ(DCSURF_SECONDARY_SURFACE_ADDRESS_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

541

reg_state->dcsurf_secondary_surface_address_high = REG_READ(DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

542

reg_state->dcsurf_secondary_surface_address_high_c = REG_READ(DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

543

reg_state->dcsurf_surface_control = REG_READ(DCSURF_SURFACE_CONTROL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

544

reg_state->dcsurf_surface_earliest_inuse = REG_READ(DCSURF_SURFACE_EARLIEST_INUSE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

545

reg_state->dcsurf_surface_earliest_inuse_c = REG_READ(DCSURF_SURFACE_EARLIEST_INUSE_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

546

reg_state->dcsurf_surface_earliest_inuse_high = REG_READ(DCSURF_SURFACE_EARLIEST_INUSE_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

547

reg_state->dcsurf_surface_earliest_inuse_high_c = REG_READ(DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

548

reg_state->dcsurf_surface_flip_interrupt = REG_READ(DCSURF_SURFACE_FLIP_INTERRUPT);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

549

reg_state->dcsurf_surface_inuse = REG_READ(DCSURF_SURFACE_INUSE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

550

reg_state->dcsurf_surface_inuse_c = REG_READ(DCSURF_SURFACE_INUSE_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

551

reg_state->dcsurf_surface_inuse_high = REG_READ(DCSURF_SURFACE_INUSE_HIGH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

552

reg_state->dcsurf_surface_inuse_high_c = REG_READ(DCSURF_SURFACE_INUSE_HIGH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

553

reg_state->dcsurf_surface_pitch = REG_READ(DCSURF_SURFACE_PITCH);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

554

reg_state->dcsurf_surface_pitch_c = REG_READ(DCSURF_SURFACE_PITCH_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

555

reg_state->dst_after_scaler = REG_READ(DST_AFTER_SCALER);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

556

reg_state->dst_dimensions = REG_READ(DST_DIMENSIONS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

557

reg_state->dst_y_delta_drq_limit = REG_READ(DST_Y_DELTA_DRQ_LIMIT);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

558

reg_state->flip_parameters_0 = REG_READ(FLIP_PARAMETERS_0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

559

reg_state->flip_parameters_1 = REG_READ(FLIP_PARAMETERS_1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

560

reg_state->flip_parameters_2 = REG_READ(FLIP_PARAMETERS_2);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

561

reg_state->flip_parameters_3 = REG_READ(FLIP_PARAMETERS_3);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

562

reg_state->flip_parameters_4 = REG_READ(FLIP_PARAMETERS_4);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

563

reg_state->flip_parameters_5 = REG_READ(FLIP_PARAMETERS_5);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

564

reg_state->flip_parameters_6 = REG_READ(FLIP_PARAMETERS_6);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

565

reg_state->hubpreq_mem_pwr_ctrl = REG_READ(HUBPREQ_MEM_PWR_CTRL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

566

reg_state->hubpreq_mem_pwr_status = REG_READ(HUBPREQ_MEM_PWR_STATUS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

567

reg_state->nom_parameters_0 = REG_READ(NOM_PARAMETERS_0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

568

reg_state->nom_parameters_1 = REG_READ(NOM_PARAMETERS_1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

569

reg_state->nom_parameters_2 = REG_READ(NOM_PARAMETERS_2);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

570

reg_state->nom_parameters_3 = REG_READ(NOM_PARAMETERS_3);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

571

reg_state->nom_parameters_4 = REG_READ(NOM_PARAMETERS_4);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

572

reg_state->nom_parameters_5 = REG_READ(NOM_PARAMETERS_5);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

573

reg_state->nom_parameters_6 = REG_READ(NOM_PARAMETERS_6);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

574

reg_state->nom_parameters_7 = REG_READ(NOM_PARAMETERS_7);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

575

reg_state->per_line_delivery = REG_READ(PER_LINE_DELIVERY);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

576

reg_state->per_line_delivery_pre = REG_READ(PER_LINE_DELIVERY_PRE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

577

reg_state->prefetch_settings = REG_READ(PREFETCH_SETTINGS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

578

reg_state->prefetch_settings_c = REG_READ(PREFETCH_SETTINGS_C);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

579

reg_state->ref_freq_to_pix_freq = REG_READ(REF_FREQ_TO_PIX_FREQ);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

580

reg_state->uclk_pstate_force = REG_READ(UCLK_PSTATE_FORCE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

581

reg_state->vblank_parameters_0 = REG_READ(VBLANK_PARAMETERS_0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

582

reg_state->vblank_parameters_1 = REG_READ(VBLANK_PARAMETERS_1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

583

reg_state->vblank_parameters_2 = REG_READ(VBLANK_PARAMETERS_2);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

584

reg_state->vblank_parameters_3 = REG_READ(VBLANK_PARAMETERS_3);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

585

reg_state->vblank_parameters_4 = REG_READ(VBLANK_PARAMETERS_4);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

586

reg_state->vblank_parameters_5 = REG_READ(VBLANK_PARAMETERS_5);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

587

reg_state->vblank_parameters_6 = REG_READ(VBLANK_PARAMETERS_6);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

588

reg_state->vmid_settings_0 = REG_READ(VMID_SETTINGS_0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

589

reg_state->hubpret_control = REG_READ(HUBPRET_CONTROL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

590

reg_state->hubpret_interrupt = REG_READ(HUBPRET_INTERRUPT);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

591

reg_state->hubpret_mem_pwr_ctrl = REG_READ(HUBPRET_MEM_PWR_CTRL);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

592

reg_state->hubpret_mem_pwr_status = REG_READ(HUBPRET_MEM_PWR_STATUS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

593

reg_state->hubpret_read_line_ctrl0 = REG_READ(HUBPRET_READ_LINE_CTRL0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

594

reg_state->hubpret_read_line_ctrl1 = REG_READ(HUBPRET_READ_LINE_CTRL1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

595

reg_state->hubpret_read_line_status = REG_READ(HUBPRET_READ_LINE_STATUS);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

596

reg_state->hubpret_read_line_value = REG_READ(HUBPRET_READ_LINE_VALUE);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

597

reg_state->hubpret_read_line0 = REG_READ(HUBPRET_READ_LINE0);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

598

reg_state->hubpret_read_line1 = REG_READ(HUBPRET_READ_LINE1);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.h

299

void hubp3_read_reg_state(struct hubp *hubp, struct dcn_hubp_reg_state *reg_state);

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

241

void (*hubp_read_reg_state)(struct hubp *hubp, struct dcn_hubp_reg_state *reg_state);

drivers/gpu/drm/i915/gt/intel_lrc_reg.h

33

#define ASSIGN_CTX_PDP(ppgtt, reg_state, n) do { \

drivers/gpu/drm/i915/gt/intel_lrc_reg.h

34

u32 *reg_state__ = (reg_state); \

drivers/gpu/drm/i915/gt/intel_lrc_reg.h

40

#define ASSIGN_CTX_PML4(ppgtt, reg_state) do { \

drivers/gpu/drm/i915/gt/intel_lrc_reg.h

41

u32 *reg_state__ = (reg_state); \

drivers/gpu/drm/i915/gvt/mmio_context.c

477

const u32 *reg_state = ce->lrc_reg_state;

drivers/gpu/drm/i915/gvt/mmio_context.c

482

(reg_state[CTX_CONTEXT_CONTROL_VAL] & inhibit_mask);

drivers/gpu/drm/i915/gvt/scheduler.c

113

workload->oactxctrl = reg_state[ctx_oactxctrl + 1];

drivers/gpu/drm/i915/gvt/scheduler.c

118

workload->flex_mmio[i] = reg_state[state_offset + 1];

drivers/gpu/drm/i915/gvt/scheduler.c

121

reg_state[ctx_oactxctrl] =

drivers/gpu/drm/i915/gvt/scheduler.c

123

reg_state[ctx_oactxctrl + 1] = workload->oactxctrl;

drivers/gpu/drm/i915/gvt/scheduler.c

129

reg_state[state_offset] = mmio;

drivers/gpu/drm/i915/gvt/scheduler.c

130

reg_state[state_offset + 1] = workload->flex_mmio[i];

drivers/gpu/drm/i915/gvt/scheduler.c

93

u32 *reg_state, bool save)

drivers/gpu/drm/i915/i915_perf.c

2463

u32 *reg_state = ce->lrc_reg_state;

drivers/gpu/drm/i915/i915_perf.c

2466

reg_state[ctx_oactxctrl + 1] =

drivers/gpu/drm/i915/i915_perf.c

2472

reg_state[ctx_flexeu0 + i * 2 + 1] =

drivers/iio/light/stk3310.c

132

struct regmap_field *reg_state;

drivers/iio/light/stk3310.c

497

ret = regmap_field_write(data->reg_state, state);

drivers/infiniband/core/roce_gid_mgmt.c

344

if (ndev->reg_state >= NETREG_UNREGISTERING)

drivers/infiniband/core/roce_gid_mgmt.c

389

if (ndev->reg_state >= NETREG_UNREGISTERING)

drivers/infiniband/core/roce_gid_mgmt.c

790

if (ndev->reg_state < NETREG_UNREGISTERED)

drivers/infiniband/core/roce_gid_mgmt.c

798

if (ndev->reg_state == NETREG_REGISTERED) {

drivers/infiniband/hw/hfi1/ipoib_tx.c

624

if (likely(txq->priv->netdev->reg_state == NETREG_REGISTERED)) {

drivers/infiniband/hw/hfi1/ipoib_tx.c

664

if (likely(txq->priv->netdev->reg_state == NETREG_REGISTERED))

drivers/infiniband/hw/hfi1/ipoib_tx.c

677

if (likely(dev->reg_state == NETREG_REGISTERED) &&

drivers/infiniband/hw/hfi1/ipoib_tx.c

94

if (unlikely(dev->reg_state != NETREG_REGISTERED))

drivers/infiniband/hw/hns/hns_roce_bond.c

808

if (net_dev->reg_state >= NETREG_UNREGISTERING) {

drivers/infiniband/ulp/ipoib/ipoib_cm.c

1528

if (dev->reg_state != NETREG_REGISTERED) {

drivers/infiniband/ulp/ipoib/ipoib_vlan.c

114

WARN_ON(ppriv->dev->reg_state != NETREG_REGISTERED);

drivers/infiniband/ulp/ipoib/ipoib_vlan.c

181

if (pdev->reg_state != NETREG_REGISTERED) {

drivers/infiniband/ulp/ipoib/ipoib_vlan.c

206

if (result && ndev->reg_state == NETREG_UNINITIALIZED)

drivers/infiniband/ulp/ipoib/ipoib_vlan.c

239

if (dev->reg_state == NETREG_REGISTERED) {

drivers/infiniband/ulp/ipoib/ipoib_vlan.c

263

if (pdev->reg_state != NETREG_REGISTERED) {

drivers/net/bonding/bond_main.c

2622

bond_dev->reg_state != NETREG_UNREGISTERING) {

drivers/net/bonding/bond_options.c

853

if (!ret && (bond->dev->reg_state == NETREG_REGISTERED))

drivers/net/bonding/bond_options.c

946

if (bond->dev->reg_state == NETREG_REGISTERED) {

drivers/net/can/rockchip/rockchip_canfd-core.c

166

u32 reg_state;

drivers/net/can/rockchip/rockchip_canfd-core.c

196

reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);

drivers/net/can/rockchip/rockchip_canfd-core.c

201

!!(reg_state & RKCANFD_REG_STATE_BUS_OFF_STATE),

drivers/net/can/rockchip/rockchip_canfd-core.c

202

!!(reg_state & RKCANFD_REG_STATE_ERROR_WARNING_STATE));

drivers/net/can/rockchip/rockchip_canfd-core.c

399

u32 reg_state, reg_cmd;

drivers/net/can/rockchip/rockchip_canfd-core.c

403

reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);

drivers/net/can/rockchip/rockchip_canfd-core.c

435

!!(reg_state & RKCANFD_REG_STATE_RX_PERIOD),

drivers/net/can/rockchip/rockchip_canfd-core.c

436

!!(reg_state & RKCANFD_REG_STATE_TX_PERIOD),

drivers/net/can/rockchip/rockchip_canfd-core.c

437

!!(reg_state & RKCANFD_REG_STATE_ERROR_WARNING_STATE),

drivers/net/can/rockchip/rockchip_canfd-core.c

438

!!(reg_state & RKCANFD_REG_STATE_BUS_OFF_STATE));

drivers/net/ethernet/airoha/airoha_eth.c

105

if (netdev->reg_state != NETREG_REGISTERED)

drivers/net/ethernet/airoha/airoha_eth.c

3510

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c

348

if (self->ndev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1336

if (intf->ndev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/broadcom/bnxt/bnxt.c

13038

if (bp->dev->reg_state == NETREG_UNREGISTERED)

drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c

446

if (bp->dev->reg_state == NETREG_UNREGISTERED) {

drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c

482

if (bp->dev->reg_state == NETREG_UNREGISTERED) {

drivers/net/ethernet/cavium/thunder/nicvf_main.c

2289

if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

5548

if (adapter->port[i]->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

5612

if (adapter->port[i]->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

7099

if (adapter->port[i]->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

7177

if (adapter->port[i]->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/hisilicon/hns/hns_enet.c

2401

if (ndev->reg_state != NETREG_UNINITIALIZED)

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

5522

if (netdev->reg_state != NETREG_UNINITIALIZED)

drivers/net/ethernet/intel/fm10k/fm10k_pci.c

2257

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/intel/iavf/iavf_main.c

1966

adapter->netdev->reg_state == NETREG_REGISTERED &&

drivers/net/ethernet/intel/iavf/iavf_main.c

1981

if (adapter->netdev->reg_state != NETREG_REGISTERED) {

drivers/net/ethernet/intel/iavf/iavf_main.c

5546

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/intel/idpf/idpf_main.c

130

if (adapter->netdevs[i]->reg_state != NETREG_UNINITIALIZED)

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

12128

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

8468

adapter->netdev->reg_state == NETREG_REGISTERED) {

drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c

4805

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/marvell/octeon_ep/octep_main.c

1607

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c

1186

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6029

const bool take_rtnl = netdev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6226

if (netdev->reg_state != NETREG_REGISTERED)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6246

if (priv->netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6528

if (netdev->reg_state != NETREG_REGISTERED)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6545

const bool need_lock = priv->netdev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

6987

if (netdev->reg_state == NETREG_REGISTERED) {

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c

842

const bool take_rtnl = netdev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

5232

ndev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

9830

if (dev->reg_state == NETREG_UNREGISTERED) {

drivers/net/ethernet/netronome/nfp/abm/qdisc.c

299

netdev->reg_state == NETREG_UNREGISTERING)

drivers/net/ethernet/pensando/ionic/ionic_lif.c

3885

if (lif->netdev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/sfc/falcon/net_driver.h

906

return efx->net_dev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/sfc/net_driver.h

1220

return efx->net_dev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/sfc/siena/net_driver.h

1118

return efx->net_dev->reg_state == NETREG_REGISTERED;

drivers/net/ethernet/ti/am65-cpsw-nuss.c

2887

if (port->ndev->reg_state == NETREG_REGISTERED)

drivers/net/ethernet/ti/cpsw_new.c

1475

if (!ndev || ndev->reg_state != NETREG_REGISTERED)

drivers/net/hyperv/netvsc_drv.c

712

if (net->reg_state != NETREG_REGISTERED)

drivers/net/hyperv/netvsc_drv.c

853

if (net->reg_state != NETREG_REGISTERED)

drivers/net/ipvlan/ipvlan_main.c

764

if (dev->reg_state != NETREG_UNREGISTERING)

drivers/net/macvlan.c

1851

if (dev->reg_state != NETREG_UNREGISTERING)

drivers/net/netconsole.c

360

nt->np.dev->reg_state != NETREG_REGISTERED) {

drivers/net/netdevsim/udp_tunnels.c

110

if (dev->reg_state == NETREG_REGISTERED) {

drivers/net/netkit.c

1157

if (READ_ONCE(dev->reg_state) != NETREG_UNREGISTERING ||

drivers/net/ovpn/peer.c

1046

if (ovpn->dev->reg_state != NETREG_REGISTERED)

drivers/net/tun.c

1385

if (tun->dev->reg_state != NETREG_REGISTERED)

drivers/net/tun.c

620

tun->dev->reg_state == NETREG_REGISTERED)

drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c

689

if (ndev->reg_state == NETREG_REGISTERED) {

drivers/net/wireless/marvell/libertas/main.c

1009

if (dev->reg_state != NETREG_REGISTERED)

drivers/net/wireless/marvell/mwifiex/cfg80211.c

3246

if (wdev->netdev->reg_state == NETREG_REGISTERED)

drivers/net/wireless/quantenna/qtnfmac/cfg80211.c

182

if (netdev->reg_state == NETREG_REGISTERED)

drivers/net/xen-netfront.c

2449

if (dev->reg_state == NETREG_UNINITIALIZED) {

drivers/net/xen-netfront.c

2664

if (info->netdev->reg_state == NETREG_REGISTERED)

drivers/s390/net/qeth_core_main.c

5356

if (card->dev->reg_state != NETREG_REGISTERED)

drivers/s390/net/qeth_l2_main.c

2326

if (card->dev->reg_state == NETREG_REGISTERED) {

drivers/s390/net/qeth_l2_main.c

2367

if (dev->reg_state != NETREG_REGISTERED) {

drivers/s390/net/qeth_l3_main.c

1965

if (card->dev->reg_state == NETREG_REGISTERED)

drivers/s390/net/qeth_l3_main.c

2000

if (dev->reg_state != NETREG_REGISTERED) {

include/linux/netdevice.h

2435

u8 reg_state;

include/linux/netdevice.h

2645

WARN_ON((dev)->reg_state != NETREG_UNINITIALIZED); \

include/linux/netdevice.h

5687

u8 reg_state = READ_ONCE(dev->reg_state);

include/linux/netdevice.h

5689

switch (reg_state) {

include/linux/netdevice.h

5698

WARN_ONCE(1, "%s: unknown reg_state %d\n", dev->name, reg_state);

include/net/netdev_lock.h

23

if (dev->reg_state == NETREG_REGISTERED ||

include/net/netdev_lock.h

24

dev->reg_state == NETREG_UNREGISTERING)

include/net/netdev_lock.h

78

if (dev->reg_state == NETREG_REGISTERED ||

include/net/netdev_lock.h

79

dev->reg_state == NETREG_UNREGISTERING)

include/net/xdp.h

65

u32 reg_state;

kernel/bpf/verifier.c

10072

struct bpf_reg_state *reg = reg_state(env, BPF_REG_4);

kernel/bpf/verifier.c

16536

struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

16618

struct bpf_reg_state *reg = reg_state(env, BPF_REG_0);

kernel/bpf/verifier.c

17148

struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

17187

dst_reg = reg_state(env, insn->dst_reg);

kernel/bpf/verifier.c

3749

struct bpf_func_state *reg_state,

kernel/bpf/verifier.c

3758

int hist_spi = spi, hist_frame = reg_state->frameno;

kernel/bpf/verifier.c

3760

stype = reg_state->stack[spi].slot_type;

kernel/bpf/verifier.c

3761

reg = &reg_state->stack[spi].spilled_ptr;

kernel/bpf/verifier.c

3766

if (bpf_is_spilled_reg(&reg_state->stack[spi])) {

kernel/bpf/verifier.c

3885

mark_reg_stack_read(env, reg_state, off, off + size, dst_regno);

kernel/bpf/verifier.c

4458

reg = reg_state(env, regno);

kernel/bpf/verifier.c

4513

val_reg = reg_state(env, value_regno);

kernel/bpf/verifier.c

4808

return __is_pointer_value(env->allow_ptr_leaks, reg_state(env, regno));

kernel/bpf/verifier.c

4813

const struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

4820

const struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

4827

const struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

4834

const struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

4842

const struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

6466

reg_type_str(env, reg_state(env, insn->dst_reg)->type));

kernel/bpf/verifier.c

6526

reg_type_str(env, reg_state(env, insn->src_reg)->type));

kernel/bpf/verifier.c

6545

reg_type_str(env, reg_state(env, insn->dst_reg)->type));

kernel/bpf/verifier.c

7170

struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

8217

struct bpf_reg_state *reg = reg_state(env, regno);

kernel/bpf/verifier.c

8406

err = check_mem_size_reg(env, reg_state(env, regno - 1), reg, argno_from_reg(regno - 1),

kernel/bpf/verifier.c

8413

err = check_mem_size_reg(env, reg_state(env, regno - 1), reg, argno_from_reg(regno - 1),

kernel/bpf/verifier.c

9926

reg = reg_state(env, BPF_REG_3);

kernel/bpf/verifier.c

9950

struct bpf_reg_state *reg = reg_state(env, BPF_REG_0);

net/8021q/vlan.c

442

if (dev->reg_state != NETREG_UNREGISTERING)

net/8021q/vlan_core.c

363

if (err && dev->reg_state != NETREG_UNREGISTERING)

net/bridge/br_device.c

232

if (dev->reg_state != NETREG_REGISTERED)

net/can/bcm.c

816

READ_ONCE(skb->dev->reg_state) == NETREG_REGISTERED)

net/can/j1939/socket.c

487

if (ndev->reg_state != NETREG_REGISTERED) {

net/can/j1939/transport.c

1604

} else if (priv->ndev->reg_state != NETREG_REGISTERED) {

net/can/raw.c

599

if (ro->bound && dev && dev->reg_state != NETREG_REGISTERED) {

net/can/raw.c

648

if (ro->bound && dev && dev->reg_state != NETREG_REGISTERED)

net/core/dev.c

1068

if (dev->reg_state > NETREG_REGISTERED ||

net/core/dev.c

1082

if (dev->reg_state > NETREG_REGISTERED ||

net/core/dev.c

11340

BUG_ON(dev->reg_state != NETREG_UNINITIALIZED);

net/core/dev.c

11449

WRITE_ONCE(dev->reg_state, ret ? NETREG_UNREGISTERED : NETREG_REGISTERED);

net/core/dev.c

11529

dev->reg_state = NETREG_DUMMY;

net/core/dev.c

11720

if (unlikely(dev->reg_state != NETREG_UNREGISTERING)) {

net/core/dev.c

11727

WRITE_ONCE(dev->reg_state, NETREG_UNREGISTERED);

net/core/dev.c

12009

WARN_ON(dev->reg_state == NETREG_REGISTERED);

net/core/dev.c

12200

if (dev->reg_state == NETREG_UNREGISTERING) {

net/core/dev.c

12238

if (dev->reg_state == NETREG_UNINITIALIZED ||

net/core/dev.c

12239

dev->reg_state == NETREG_DUMMY) {

net/core/dev.c

12244

BUG_ON(dev->reg_state != NETREG_UNREGISTERED);

net/core/dev.c

12245

WRITE_ONCE(dev->reg_state, NETREG_RELEASED);

net/core/dev.c

12388

if (dev->reg_state == NETREG_UNINITIALIZED) {

net/core/dev.c

12397

BUG_ON(dev->reg_state != NETREG_REGISTERED);

net/core/dev.c

12422

WRITE_ONCE(dev->reg_state, NETREG_UNREGISTERING);

net/core/dev.c

12549

if (dev->reg_state != NETREG_REGISTERED) {

net/core/dev.c

3200

if (dev->reg_state == NETREG_REGISTERED ||

net/core/dev.c

3201

dev->reg_state == NETREG_UNREGISTERING) {

net/core/dev.c

3250

if (dev->reg_state == NETREG_REGISTERED) {

net/core/dev.c

6515

if (READ_ONCE(skb->dev->reg_state) == NETREG_UNREGISTERING) {

net/core/dev.c

6525

if (READ_ONCE(skb->dev->reg_state) == NETREG_UNREGISTERING) {

net/core/dev.c

843

if (!napi || READ_ONCE(napi->dev->reg_state) != NETREG_REGISTERED) {

net/core/dev.h

413

return READ_ONCE(dev->reg_state) <= NETREG_REGISTERED;

net/core/link_watch.c

51

if (dev->reg_state <= NETREG_REGISTERED)

net/core/net-sysfs.c

2031

WARN(dev->reg_state == NETREG_UNREGISTERING && new_num > old_num,

net/core/net-sysfs.c

2225

BUG_ON(dev->reg_state != NETREG_RELEASED);

net/core/netdev_rx_queue.c

290

if (dev->reg_state > NETREG_REGISTERED &&

net/core/rtnetlink.c

4563

if (dev->reg_state != NETREG_REGISTERED)

net/core/xdp.c

1008

if (dev->reg_state == NETREG_REGISTERED)

net/core/xdp.c

139

if (xdp_rxq->reg_state != REG_STATE_REGISTERED) {

net/core/xdp.c

151

if (xdp_rxq->reg_state == REG_STATE_UNUSED)

net/core/xdp.c

156

xdp_rxq->reg_state = REG_STATE_UNREGISTERED;

net/core/xdp.c

176

if (xdp_rxq->reg_state == REG_STATE_UNUSED) {

net/core/xdp.c

181

if (xdp_rxq->reg_state == REG_STATE_REGISTERED) {

net/core/xdp.c

192

xdp_rxq->reg_state = REG_STATE_REGISTERED;

net/core/xdp.c

199

xdp_rxq->reg_state = REG_STATE_UNUSED;

net/core/xdp.c

205

return (xdp_rxq->reg_state == REG_STATE_REGISTERED);

net/core/xdp.c

352

if (xdp_rxq->reg_state != REG_STATE_REGISTERED) {

net/ethtool/ioctl.c

3628

if (dev->reg_state > NETREG_REGISTERED ||

net/ethtool/netlink.c

105

dev->reg_state >= NETREG_UNREGISTERING) {

net/ipv6/route.c

6502

dev->reg_state != NETREG_UNREGISTERED) {

net/openvswitch/vport-netdev.c

115

if (tunnel && vport->dev->reg_state == NETREG_REGISTERED)

net/openvswitch/vport-netdev.c

217

if (vport->dev->reg_state == NETREG_REGISTERED)

net/openvswitch/vport-netdev.c

89

if (vport->dev->reg_state != NETREG_REGISTERED) {

net/phonet/pn_dev.c

126

if ((dev->reg_state == NETREG_REGISTERED) &&

net/phonet/pn_dev.c

226

if ((pnd->netdev->reg_state != NETREG_REGISTERED) ||

net/psp/psp_nl.c

552

if (READ_ONCE(assoc_dev->reg_state) != NETREG_REGISTERED) {

net/sched/sch_generic.c

637

if (dev->reg_state == NETREG_UNINITIALIZED)

net/sched/sch_generic.c

654

if (dev->reg_state == NETREG_UNINITIALIZED)

net/sched/sch_generic.c

672

if (dev->reg_state == NETREG_UNINITIALIZED)

net/shaper/shaper.c

60

READ_ONCE(binding->netdev->reg_state) <= NETREG_REGISTERED)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1134

static int parse_reg_state(const char *s, struct reg_state *reg)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1264

struct reg_state *false1_reg, struct reg_state *false2_reg,

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1265

struct reg_state *true1_reg, struct reg_state *true2_reg)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1271

struct reg_state *state;

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1306

*specs[i].state = (struct reg_state){.valid = false};

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1349

static bool reg_state_needs_two_arcs(struct reg_state *s)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1359

static bool assert_reg_state_eq(struct reg_state *r, struct reg_state *e, const char *ctx)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1407

struct reg_state *fr1, struct reg_state *fr2,

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1408

struct reg_state *tr1, struct reg_state *tr2,

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1415

struct reg_state rc;

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1549

struct reg_state fr1, fr2, tr1, tr2;

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

1550

struct reg_state fe1, fe2, te1, te2;

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

766

static void print_reg_state(struct reg_state *r, const char *sfx)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

799

static void reg_state_refine(struct reg_state *r, enum num_t t, struct range x, const char *ctx)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

837

static void reg_state_set_const(struct reg_state *rs, enum num_t t, u64 val)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

848

static void reg_state_cond(enum num_t t, struct reg_state *x, struct reg_state *y, enum op op,

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

849

struct reg_state *newx, struct reg_state *newy, const char *ctx)

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

853

struct reg_state xx = *x, yy = *y;

tools/testing/selftests/bpf/prog_tests/reg_bounds.c

892

static int reg_state_branch_taken_op(enum num_t t, struct reg_state *x, struct reg_state *y,