CPM_BRG1
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
{CPM_CLK_SCC1, CPM_BRG1, 0},
{CPM_CLK_SCC2, CPM_BRG1, 0},
{CPM_CLK_SCC3, CPM_BRG1, 0},
{CPM_CLK_SCC4, CPM_BRG1, 0},
{CPM_CLK_SMC1, CPM_BRG1, 0},
{CPM_CLK_SMC2, CPM_BRG1, 0},
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
{CPM_CLK_SCC1, CPM_BRG1, 0},
{CPM_CLK_SCC2, CPM_BRG1, 0},
{CPM_CLK_SCC3, CPM_BRG1, 0},
{CPM_CLK_SCC4, CPM_BRG1, 0},
{CPM_CLK_SMC1, CPM_BRG1, 0},