arch/powerpc/include/asm/io.h

715

return readl_be(addr);

arch/powerpc/include/asm/io.h

853

#define mmio_read32be(addr) readl_be(addr)

drivers/crypto/amcc/crypto4xx_core.c

1096

val[0] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_0);

drivers/crypto/amcc/crypto4xx_core.c

1097

val[1] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_1);

drivers/misc/ocxl/mmio.c

124

tmp = readl_be((char *)afu->global_mmio_ptr + offset);

drivers/misc/ocxl/mmio.c

186

tmp = readl_be((char *)afu->global_mmio_ptr + offset);

drivers/misc/ocxl/mmio.c

20

*val = readl_be((char *)afu->global_mmio_ptr + offset);

drivers/usb/host/ehci.h

762

readl_be(regs) :

drivers/usb/host/ehci.h

806

hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS);

drivers/usb/host/ehci.h

813

(void) readl_be(ehci->ohci_hcctrl_reg);

drivers/usb/host/ohci-ppc-of.c

163

writel_be((readl_be(&ohci->regs->control) |

drivers/usb/host/ohci-ppc-of.c

165

(void) readl_be(&ohci->regs->control);

drivers/usb/host/ohci.h

566

readl_be (regs) :

drivers/usb/host/uhci-hcd.h

604

return readl_be(uhci->regs + reg);

sound/pci/mixart/mixart.c

1171

ref = readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET));

sound/pci/mixart/mixart.c

1174

u32 mailbox = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET)) / ref;

sound/pci/mixart/mixart.c

1175

u32 streaming = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET)) / ref;

sound/pci/mixart/mixart.c

1176

u32 interr = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET)) / ref;

sound/pci/mixart/mixart_core.c

101

headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));

sound/pci/mixart/mixart_core.c

141

tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));

sound/pci/mixart/mixart_core.c

142

headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD));

sound/pci/mixart/mixart_core.c

153

msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr));

sound/pci/mixart/mixart_core.c

200

headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));

sound/pci/mixart/mixart_core.c

39

tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));

sound/pci/mixart/mixart_core.c

40

headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD));

sound/pci/mixart/mixart_core.c

50

*msg_frame = readl_be(MIXART_MEM(mgr, tailptr));

sound/pci/mixart/mixart_core.c

74

size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */

sound/pci/mixart/mixart_core.c

75

resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */

sound/pci/mixart/mixart_core.c

76

resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */

sound/pci/mixart/mixart_core.c

77

resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */

sound/pci/mixart/mixart_hwdep.c

344

status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));

sound/pci/mixart/mixart_hwdep.c

346

status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));

sound/pci/mixart/mixart_hwdep.c

348

status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));

sound/pci/mixart/mixart_hwdep.c

46

read = readl_be( MIXART_MEM( mgr, offset ));

sound/pci/mixart/mixart_hwdep.c

462

mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET)));

sound/pci/mixart/mixart_hwdep.c

499

val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET ));

sound/pci/mixart/mixart_hwdep.h

15

#ifndef readl_be