r24
unsigned long r24;
dest[24] = pt->r24;
PT_REG( r24), PT_REG( r25), PT_REG( r26), PT_REG( r27),
err |= __get_user(regs->r24, sc->sc_regs+24);
err |= __put_user(regs->r24, sc->sc_regs+24);
regs->r22, regs->r23, regs->r24);
R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
push r24
pop r24
push r24
pop r24
unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
unsigned long r24;
PTREGS_INFO(r24), \
unsigned long r25, r24, r23, r22, r21, r20;
membuf_store(&to, cregs->r24);
REG_IN_ONE(callee.r24, &cregs->r24);
regs->r24, regs->r25);
DEST.r24 = REGS->r24; \
unsigned long r24;
unsigned long r24;
unsigned long r24;
{ "r24", GDB_SIZEOF_REG, offsetof(struct pt_regs, r24)},
ss->r24 = (unsigned long)args->fn;
printk(KERN_EMERG "r24: \t0x%08lx %08lx %08lx %08lx\n", regs->r24,
#define s1 $r24
REG_OFFSET_NAME(r24, regs[24]),
__u32 r24;
_r->r24 = _r->r25 = _r->r26 = _r->r27 = \
microblaze_reg_t r24;
DEFINE(CC_R24, offsetof(struct cpu_context, r24));
DEFINE(PT_R24, offsetof(struct pt_regs, r24));
regs->r21, regs->r22, regs->r23, regs->r24);
COPY(r22); COPY(r23); COPY(r24); COPY(r25);
COPY(r22); COPY(r23); COPY(r24); COPY(r25);
REG_OFFSET_NAME(r24, regs[24]),
rdctl r24, estatus
andi r24, r24, ESTATUS_EU
beq r24, r0, 1f /* In supervisor mode, already on kernel stack */
movia r24, _current_thread /* Switch to current kernel stack */
ldw r24, 0(r24) /* using the thread_info */
addi r24, r24, THREAD_SIZE-PT_REGS_SIZE
stw sp, PT_SP(r24) /* Save user stack before changing */
mov sp, r24
1 : mov r24, sp
stw r24, PT_SP(sp)
movi r24, -1
stw r24, PT_ORIG_R2(sp)
rdctl r24, estatus
stw r24, PT_ESTATUS(sp)
ldw r24, PT_ESTATUS(sp)
wrctl estatus, r24
arg2: .reg %r24
r24: .reg %r24
STREG %r24, PT_GR24(\regs)
LDREG PT_GR24(\regs), %r24
#define K_LOAD_ARGS_3(r26,r25,r24) \
register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
K_LOAD_ARGS_3(r26,r25,r24)
#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
K_LOAD_ARGS_4(r26,r25,r24,r23)
#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23,
#define r24 %r24
u32 val, r9, r24;
err = ice_read_cgu_reg(hw, ICE_CGU_R24, &r24);
ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24),
FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r24),
if (FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24)) {
r24 &= ~ICE_CGU_R23_R24_TSPLL_ENABLE;
err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);
err = ice_read_cgu_reg(hw, ICE_CGU_R24, &r24);
r24 &= ~(ICE_CGU_R23_R24_REF1588_CK_DIV | ICE_CGU_R24_FBDIV_FRAC |
r24 |= FIELD_PREP(ICE_CGU_R23_R24_REF1588_CK_DIV,
r24 |= FIELD_PREP(ICE_CGU_R24_FBDIV_FRAC,
r24 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);
err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);
r24 |= ICE_CGU_R23_R24_TSPLL_ENABLE;
err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);
err = ice_read_cgu_reg(hw, ICE_CGU_R24, &r24);
ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24),
FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r24),
r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, \
.radio_tx0_pgag_boost_tune = r24, \
r20, r21, r22, r23, r24, r25, r26, r27) \
.radio_txmix5g_boost_tune_core1 = r24, \
#define rI0 r24 /* IV */
#define s1 $r24
std r24,(top_pos - 56)(%r1); \
ld r24,(top_pos - 56)(%r1); \
ld r24,80(r3)
#define r24 %r24