drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6488

&plane_info->plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6532

dc_plane_state->plane_size = plane_info.plane_size;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8386

dc_plane_state->plane_size.surface_pitch = ((stream->src.width + 255) / 256) * 256;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8387

dc_plane_state->plane_size.surface_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8388

dc_plane_state->plane_size.surface_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8389

dc_plane_state->plane_size.chroma_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8390

dc_plane_state->plane_size.chroma_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1009

&plane_state->tiling_info, &plane_state->plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

269

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

289

input.surface_size.width = plane_size->surface_size.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

290

input.surface_size.height = plane_size->surface_size.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

315

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

355

ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

366

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

395

ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

846

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

855

memset(plane_size, 0, sizeof(*plane_size));

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

864

plane_size->surface_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

865

plane_size->surface_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

866

plane_size->surface_size.width = fb->width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

867

plane_size->surface_size.height = fb->height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

868

plane_size->surface_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

878

plane_size->surface_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

879

plane_size->surface_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

880

plane_size->surface_size.width = fb->width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

881

plane_size->surface_size.height = fb->height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

882

plane_size->surface_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

885

plane_size->chroma_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

886

plane_size->chroma_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

888

plane_size->chroma_size.width = fb->width / 2;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

889

plane_size->chroma_size.height = fb->height / 2;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

891

plane_size->chroma_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

907

rotation, plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

914

rotation, plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

51

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

449

__entry->surface_pitch = plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2883

pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch);

drivers/gpu/drm/amd/display/dc/core/dc.c

2832

if (u->plane_info->plane_size.surface_pitch != u->surface->plane_size.surface_pitch

drivers/gpu/drm/amd/display/dc/core/dc.c

2833

|| u->plane_info->plane_size.chroma_pitch != u->surface->plane_size.chroma_pitch) {

drivers/gpu/drm/amd/display/dc/core/dc.c

3254

surface->plane_size =

drivers/gpu/drm/amd/display/dc/core/dc.c

3255

srf_update->plane_info->plane_size;

drivers/gpu/drm/amd/display/dc/core/dc.c

7333

if (pipe_ctx->plane_state->plane_size.surface_size.width > 0) {

drivers/gpu/drm/amd/display/dc/core/dc.c

7334

state->hubp[i].surface_size_width = pipe_ctx->plane_state->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/core/dc.c

7335

state->hubp[i].surface_size_height = pipe_ctx->plane_state->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/core/dc.c

7352

state->hubp[i].surface_pitch = pipe_ctx->plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/core/dc.c

7354

state->hubp[i].chroma_pitch = pipe_ctx->plane_state->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

90

update->plane_info->plane_size.surface_pitch,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

91

update->plane_info->plane_size.surface_size.height,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

92

update->plane_info->plane_size.surface_size.width,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

93

update->plane_info->plane_size.surface_size.x,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

94

update->plane_info->plane_size.surface_size.y,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2406

struct plane_size size = params->program_surface_config_params.plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4598

struct plane_size plane_size,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4609

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.plane_size = plane_size;

drivers/gpu/drm/amd/display/dc/dc.h

1556

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/dc.h

1630

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

489

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

491

const struct rect *in_rect = &plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

492

struct rect hw_rect = plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

521

GRPH_PITCH, plane_size->surface_pitch);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

531

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

533

struct rect hw_rect = plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

551

GRPH_PITCH, plane_size->surface_pitch);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

656

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

667

program_size_and_rotation(dce_mi, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

678

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

687

dce60_program_size(dce_mi, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

233

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

236

struct plane_size local_size = *plane_size;

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

642

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

653

program_size_and_rotation(mem_input110, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1642

pipes[pipe_cnt].pipe.src.surface_width_y = pln->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1643

pipes[pipe_cnt].pipe.src.surface_height_y = pln->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1644

pipes[pipe_cnt].pipe.src.surface_width_c = pln->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1645

pipes[pipe_cnt].pipe.src.surface_height_c = pln->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1648

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1649

pipes[pipe_cnt].pipe.src.data_pitch_c = pln->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1653

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

458

surface->plane0.pitch = plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

459

surface->plane1.pitch = plane_state->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

460

surface->plane0.height = plane_state->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

461

surface->plane0.width = plane_state->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

462

surface->plane1.height = plane_state->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

463

surface->plane1.width = plane_state->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

303

memcpy(&phantom_plane->plane_size, &main_plane->plane_size,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

304

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

792

memcpy(&phantom_plane->plane_size, &curr_pipe->plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

793

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

924

out->PitchY[location] = in->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

925

out->SurfaceHeightY[location] = in->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

926

out->SurfaceWidthY[location] = in->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

927

out->SurfaceHeightC[location] = in->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

928

out->SurfaceWidthC[location] = in->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

929

out->PitchC[location] = in->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

167

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

177

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

180

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

182

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

185

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

561

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

570

hubp1_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

864

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

886

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

332

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

347

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

350

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

352

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

355

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

555

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

566

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

380

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

396

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

46

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

54

hubp1_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

416

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

427

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.h

269

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

176

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

187

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.h

69

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

599

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

615

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

618

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

619

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

621

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

635

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

646

hubp401_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

287

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

294

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

298

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

309

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3154

&plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

320

&plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3036

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1839

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1023

dc->hwss.does_plane_fit_in_mall(dc, plane->plane_size.surface_pitch,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1024

plane->plane_size.surface_size.height, plane->format,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3841

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

187

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2268

struct plane_size plane_size,

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

214

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h

168

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1832

memcpy(&phantom_plane->plane_size, &curr_pipe->plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1833

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/i915/display/intel_fb.c

1915

unsigned int plane_size;

drivers/gpu/drm/i915/display/intel_fb.c

1918

plane_size = rem_info->plane[i].size;

drivers/gpu/drm/i915/display/intel_fb.c

1920

plane_size = rem_info->plane[i].dst_stride * rem_info->plane[i].height;

drivers/gpu/drm/i915/display/intel_fb.c

1922

if (plane_size == 0)

drivers/gpu/drm/i915/display/intel_fb.c

1928

size += plane_size;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

108

layout->plane_size[2] = round_up(layout->plane_pitch[2] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

116

layout->plane_size[3] = round_up(layout->plane_pitch[3] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

123

layout->plane_size[0] = round_up(layout->plane_pitch[0] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

138

layout->plane_size[2] = round_up(layout->plane_pitch[2] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

154

layout->plane_size[0] = fb->width * fb->height * fmt->bpp;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

175

layout->plane_size[0] = layout->plane_pitch[0] * fb->height;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

176

layout->plane_size[1] = layout->plane_pitch[1] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

180

layout->plane_size[1] *= 2;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

184

layout->plane_size[2] = layout->plane_size[1];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

250

layout->total_size += layout->plane_size[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

290

layout->plane_addr[0] = base_addr + layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

293

layout->plane_addr[1] = base_addr + layout->plane_size[0]

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

294

+ layout->plane_size[2] + layout->plane_size[3];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

303

layout->plane_addr[3] = base_addr + layout->plane_size[0]

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

304

+ layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

324

layout->plane_addr[0] = base_addr + layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

93

layout->plane_size[0] = round_up(layout->plane_pitch[0] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

97

layout->plane_size[1] = round_up(layout->plane_pitch[1] *

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

322

uint32_t plane_size[DPU_MAX_PLANES];

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

794

__entry->layout.plane_size[0],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

796

__entry->layout.plane_size[1],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

798

__entry->layout.plane_size[2],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

800

__entry->layout.plane_size[3], __entry->multirect_index)

drivers/media/pci/hws/hws_irq.c

136

size_t plane_size = vb2_plane_size(&vb2v->vb2_buf, 0);

drivers/media/pci/hws/hws_irq.c

138

if (expected > plane_size) {

drivers/media/pci/hws/hws_irq.c

141

ch, expected, plane_size,

drivers/media/platform/mediatek/mdp/mtk_mdp_ipi.h

99

int32_t plane_size[MTK_MDP_MAX_NUM_PLANE];

drivers/media/platform/mediatek/mdp/mtk_mdp_regs.c

101

src_buf->plane_size[i] = frame->payload[i];

drivers/media/platform/mediatek/mdp/mtk_mdp_regs.c

131

dst_buf->plane_size[i] = frame->payload[i];

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1073

unsigned int bpl, plane_size;

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1078

plane_size = bpl * f->fmt.pix_mp.height *

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1084

plane_size = max(p->sizeimage, plane_size >> 3);

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1087

p->sizeimage = plane_size;

drivers/media/test-drivers/vivid/vivid-sdr-cap.c

522

unsigned long plane_size = vb2_plane_size(&buf->vb.vb2_buf, 0);

drivers/media/test-drivers/vivid/vivid-sdr-cap.c

534

for (i = 0; i < plane_size; i += 2) {

drivers/media/usb/pwc/pwc-dec23.c

656

unsigned int plane_size;

drivers/media/usb/pwc/pwc-dec23.c

662

plane_size = pdev->height * pdev->width;

drivers/media/usb/pwc/pwc-dec23.c

665

pout_planar_u = dst + plane_size;

drivers/media/usb/pwc/pwc-dec23.c

666

pout_planar_v = dst + plane_size + plane_size / 4;