arch/arc/net/bpf_jit_arcv2.c

1282

const u32 insn = OPC_BCC | BCC_S21(offset) | COND(cc);

arch/arc/net/bpf_jit_arcv2.c

708

const u32 insn = OPC_MOV_CC | OP_B(rd) | OP_C(rs) | COND(cc);

arch/arc/net/bpf_jit_arcv2.c

718

const u32 insn = OPC_MOVU_CC | OP_B(rd) | OP_C(imm) | COND(cc);

arch/sparc/net/bpf_jit_comp_32.c

36

#define CONDN COND(0x0)

arch/sparc/net/bpf_jit_comp_32.c

37

#define CONDE COND(0x1)

arch/sparc/net/bpf_jit_comp_32.c

38

#define CONDLE COND(0x2)

arch/sparc/net/bpf_jit_comp_32.c

39

#define CONDL COND(0x3)

arch/sparc/net/bpf_jit_comp_32.c

40

#define CONDLEU COND(0x4)

arch/sparc/net/bpf_jit_comp_32.c

41

#define CONDCS COND(0x5)

arch/sparc/net/bpf_jit_comp_32.c

42

#define CONDNEG COND(0x6)

arch/sparc/net/bpf_jit_comp_32.c

43

#define CONDVC COND(0x7)

arch/sparc/net/bpf_jit_comp_32.c

44

#define CONDA COND(0x8)

arch/sparc/net/bpf_jit_comp_32.c

45

#define CONDNE COND(0x9)

arch/sparc/net/bpf_jit_comp_32.c

46

#define CONDG COND(0xa)

arch/sparc/net/bpf_jit_comp_32.c

47

#define CONDGE COND(0xb)

arch/sparc/net/bpf_jit_comp_32.c

48

#define CONDGU COND(0xc)

arch/sparc/net/bpf_jit_comp_32.c

49

#define CONDCC COND(0xd)

arch/sparc/net/bpf_jit_comp_32.c

50

#define CONDPOS COND(0xe)

arch/sparc/net/bpf_jit_comp_32.c

51

#define CONDVS COND(0xf)

arch/sparc/net/bpf_jit_comp_64.c

67

#define CONDN COND(0x0)

arch/sparc/net/bpf_jit_comp_64.c

68

#define CONDE COND(0x1)

arch/sparc/net/bpf_jit_comp_64.c

69

#define CONDLE COND(0x2)

arch/sparc/net/bpf_jit_comp_64.c

70

#define CONDL COND(0x3)

arch/sparc/net/bpf_jit_comp_64.c

71

#define CONDLEU COND(0x4)

arch/sparc/net/bpf_jit_comp_64.c

72

#define CONDCS COND(0x5)

arch/sparc/net/bpf_jit_comp_64.c

73

#define CONDNEG COND(0x6)

arch/sparc/net/bpf_jit_comp_64.c

74

#define CONDVC COND(0x7)

arch/sparc/net/bpf_jit_comp_64.c

75

#define CONDA COND(0x8)

arch/sparc/net/bpf_jit_comp_64.c

76

#define CONDNE COND(0x9)

arch/sparc/net/bpf_jit_comp_64.c

77

#define CONDG COND(0xa)

arch/sparc/net/bpf_jit_comp_64.c

78

#define CONDGE COND(0xb)

arch/sparc/net/bpf_jit_comp_64.c

79

#define CONDGU COND(0xc)

arch/sparc/net/bpf_jit_comp_64.c

80

#define CONDCC COND(0xd)

arch/sparc/net/bpf_jit_comp_64.c

81

#define CONDPOS COND(0xe)

arch/sparc/net/bpf_jit_comp_64.c

82

#define CONDVS COND(0xf)

arch/x86/kernel/uprobes.c

1277

COND(70, 71, XF(OF)) \

arch/x86/kernel/uprobes.c

1278

COND(72, 73, XF(CF)) \

arch/x86/kernel/uprobes.c

1279

COND(74, 75, XF(ZF)) \

arch/x86/kernel/uprobes.c

1280

COND(78, 79, XF(SF)) \

arch/x86/kernel/uprobes.c

1281

COND(7a, 7b, XF(PF)) \

arch/x86/kernel/uprobes.c

1282

COND(76, 77, XF(CF) || XF(ZF)) \

arch/x86/kernel/uprobes.c

1283

COND(7c, 7d, XF(SF) != XF(OF)) \

arch/x86/kernel/uprobes.c

1284

COND(7e, 7f, XF(ZF) || XF(SF) != XF(OF))

drivers/gpu/drm/gma500/cdv_intel_display.c

114

#define _wait_for(COND, MS, W) ({ \

drivers/gpu/drm/gma500/cdv_intel_display.c

117

while (!(COND)) { \

drivers/gpu/drm/gma500/cdv_intel_display.c

128

#define wait_for(COND, MS) _wait_for(COND, MS, 1)

drivers/gpu/drm/gma500/cdv_intel_dp.c

234

#define _wait_for(COND, MS, W) ({ \

drivers/gpu/drm/gma500/cdv_intel_dp.c

237

while (! (COND)) { \

drivers/gpu/drm/gma500/cdv_intel_dp.c

247

#define wait_for(COND, MS) _wait_for(COND, MS, 1)

drivers/gpu/drm/gma500/intel_gmbus.c

41

#define _wait_for(COND, MS, W) ({ \

drivers/gpu/drm/gma500/intel_gmbus.c

44

while (! (COND)) { \

drivers/gpu/drm/gma500/intel_gmbus.c

55

#define wait_for(COND, MS) _wait_for(COND, MS, 1)

drivers/gpu/drm/i915/i915_wait_util.h

104

ret__ = _wait_for((COND), (US), 10, 10); \

drivers/gpu/drm/i915/i915_wait_util.h

106

ret__ = _wait_for_atomic((COND), (US), 0); \

drivers/gpu/drm/i915/i915_wait_util.h

110

#define wait_for_atomic_us(COND, US) \

drivers/gpu/drm/i915/i915_wait_util.h

114

_wait_for_atomic((COND), (US), 1); \

drivers/gpu/drm/i915/i915_wait_util.h

117

#define wait_for_atomic(COND, MS) wait_for_atomic_us((COND), (MS) * 1000)

drivers/gpu/drm/i915/i915_wait_util.h

21

#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \

drivers/gpu/drm/i915/i915_wait_util.h

31

if (COND) { \

drivers/gpu/drm/i915/i915_wait_util.h

46

#define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \

drivers/gpu/drm/i915/i915_wait_util.h

48

#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)

drivers/gpu/drm/i915/i915_wait_util.h

62

#define _wait_for_atomic(COND, US, ATOMIC) \

drivers/gpu/drm/i915/i915_wait_util.h

78

if (COND) { \

drivers/gpu/drm/i915/i915_wait_util.h

99

#define wait_for_us(COND, US) \

drivers/gpu/drm/i915/intel_pcode.c

178

if (COND) {

drivers/gpu/drm/i915/intel_pcode.c

182

ret = _wait_for(COND, timeout_base_ms * 1000, 10, 10);

drivers/gpu/drm/i915/intel_pcode.c

200

ret = wait_for_atomic(COND, 50);

drivers/gpu/drm/i915/intel_uncore.c

2495

if (wait_for(COND, 2000) == -ETIMEDOUT) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

103

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE0_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

109

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE1_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

115

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE2_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

121

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE3_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

127

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE4_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

133

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE5_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

139

COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE6_MIXER1);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

300

COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

306

COND(format->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

639

COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEX_FILTER_COMP_1_2(uv_filter));

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

644

COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEY_FILTER_COMP_1_2(uv_filter));

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

784

COND(format->alpha_enable, MDP5_PIPE_SRC_FORMAT_ALPHA_ENABLE) |

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

787

COND(format->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

801

COND(has_pe, MDP5_PIPE_SRC_OP_MODE_SW_PIX_EXT_OVERRIDE) |

drivers/gpu/drm/msm/hdmi/hdmi_audio.c

114

COND(enabled, HDMI_AUD_INT_AUD_FIFO_URUN_INT) |

drivers/gpu/drm/msm/hdmi/hdmi_audio.c

115

COND(enabled, HDMI_AUD_INT_AUD_SAM_DROP_INT));

drivers/gpu/drm/msm/hdmi/hdmi_audio.c

84

COND(audio->channels != 2, HDMI_AUDIO_PKT_CTRL2_LAYOUT) |

drivers/gpu/drm/v3d/v3d_drv.h

497

#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \

drivers/gpu/drm/v3d/v3d_drv.h

507

if (COND) { \

drivers/gpu/drm/v3d/v3d_drv.h

522

#define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \

drivers/gpu/drm/v3d/v3d_drv.h

524

#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)

drivers/gpu/drm/vc4/vc4_drv.h

874

#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \

drivers/gpu/drm/vc4/vc4_drv.h

884

if (COND) { \

drivers/gpu/drm/vc4/vc4_drv.h

899

#define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \

drivers/gpu/drm/vc4/vc4_drv.h

901

#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)

net/core/dev.c

2425

#define net_timestamp_check(COND, SKB) \

net/core/dev.c

2427

if ((COND) && !(SKB)->tstamp) \

tools/perf/util/perf_event_attr_fprintf.c

57

bit_name(COND), bit_name(CALL_STACK), bit_name(IND_JUMP),