drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6220

&plane_info->plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6264

dc_plane_state->plane_size = plane_info.plane_size;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8044

dc_plane_state->plane_size.surface_pitch = ((stream->src.width + 255) / 256) * 256;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8045

dc_plane_state->plane_size.surface_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8046

dc_plane_state->plane_size.surface_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8047

dc_plane_state->plane_size.chroma_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8048

dc_plane_state->plane_size.chroma_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1010

&plane_state->tiling_info, &plane_state->plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

269

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

289

input.surface_size.width = plane_size->surface_size.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

290

input.surface_size.height = plane_size->surface_size.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

315

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

355

ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

366

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

395

ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

845

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

854

memset(plane_size, 0, sizeof(*plane_size));

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

863

plane_size->surface_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

864

plane_size->surface_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

865

plane_size->surface_size.width = fb->width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

866

plane_size->surface_size.height = fb->height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

867

plane_size->surface_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

877

plane_size->surface_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

878

plane_size->surface_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

879

plane_size->surface_size.width = fb->width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

880

plane_size->surface_size.height = fb->height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

881

plane_size->surface_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

884

plane_size->chroma_size.x = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

885

plane_size->chroma_size.y = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

887

plane_size->chroma_size.width = fb->width / 2;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

888

plane_size->chroma_size.height = fb->height / 2;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

890

plane_size->chroma_pitch =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

906

rotation, plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

913

rotation, plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

51

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

449

__entry->surface_pitch = plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2883

pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch);

drivers/gpu/drm/amd/display/dc/core/dc.c

2742

if (u->plane_info->plane_size.surface_pitch != u->surface->plane_size.surface_pitch

drivers/gpu/drm/amd/display/dc/core/dc.c

2743

|| u->plane_info->plane_size.chroma_pitch != u->surface->plane_size.chroma_pitch) {

drivers/gpu/drm/amd/display/dc/core/dc.c

3126

surface->plane_size =

drivers/gpu/drm/amd/display/dc/core/dc.c

3127

srf_update->plane_info->plane_size;

drivers/gpu/drm/amd/display/dc/core/dc.c

6644

if (pipe_ctx->plane_state->plane_size.surface_size.width > 0) {

drivers/gpu/drm/amd/display/dc/core/dc.c

6645

state->hubp[i].surface_size_width = pipe_ctx->plane_state->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/core/dc.c

6646

state->hubp[i].surface_size_height = pipe_ctx->plane_state->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/core/dc.c

6663

state->hubp[i].surface_pitch = pipe_ctx->plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/core/dc.c

6665

state->hubp[i].chroma_pitch = pipe_ctx->plane_state->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

90

update->plane_info->plane_size.surface_pitch,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

91

update->plane_info->plane_size.surface_size.height,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

92

update->plane_info->plane_size.surface_size.width,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

93

update->plane_info->plane_size.surface_size.x,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

94

update->plane_info->plane_size.surface_size.y,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2029

struct plane_size size = params->program_surface_config_params.plane_size;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3881

struct plane_size plane_size,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3892

seq_state->steps[*seq_state->num_steps].params.program_surface_config_params.plane_size = plane_size;

drivers/gpu/drm/amd/display/dc/dc.h

1474

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/dc.h

1547

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

487

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

489

const struct rect *in_rect = &plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

490

struct rect hw_rect = plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

519

GRPH_PITCH, plane_size->surface_pitch);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

529

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

531

struct rect hw_rect = plane_size->surface_size;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

549

GRPH_PITCH, plane_size->surface_pitch);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

654

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

663

program_size_and_rotation(dce_mi, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

674

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

683

dce60_program_size(dce_mi, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

231

const struct plane_size *plane_size)

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

234

struct plane_size local_size = *plane_size;

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

640

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

649

program_size_and_rotation(mem_input110, rotation, plane_size);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1632

pipes[pipe_cnt].pipe.src.surface_width_y = pln->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1633

pipes[pipe_cnt].pipe.src.surface_height_y = pln->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1634

pipes[pipe_cnt].pipe.src.surface_width_c = pln->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1635

pipes[pipe_cnt].pipe.src.surface_height_c = pln->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1638

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1639

pipes[pipe_cnt].pipe.src.data_pitch_c = pln->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1643

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

436

surface->plane0.pitch = plane_state->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

437

surface->plane1.pitch = plane_state->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

438

surface->plane0.height = plane_state->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

439

surface->plane0.width = plane_state->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

440

surface->plane1.height = plane_state->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

441

surface->plane1.width = plane_state->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

301

memcpy(&phantom_plane->plane_size, &main_plane->plane_size,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

302

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

762

memcpy(&phantom_plane->plane_size, &curr_pipe->plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

763

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

916

out->PitchY[location] = in->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

917

out->SurfaceHeightY[location] = in->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

918

out->SurfaceWidthY[location] = in->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

919

out->SurfaceHeightC[location] = in->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

920

out->SurfaceWidthC[location] = in->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

921

out->PitchC[location] = in->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

166

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

176

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

179

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

181

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

184

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

560

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

568

hubp1_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

864

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

886

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

331

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

346

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

349

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

351

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

354

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

554

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

564

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

374

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

390

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

46

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

54

hubp1_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

415

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

425

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.h

269

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

176

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

186

hubp2_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.h

69

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

598

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

613

ASSERT(plane_size->chroma_pitch != 0);

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

616

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

617

pitch_c = plane_size->chroma_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

619

pitch = plane_size->surface_pitch - 1;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

633

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

643

hubp401_program_size(hubp, format, plane_size, dcc);

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

287

const struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

294

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2959

&plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

320

&plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2986

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1828

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

975

dc->hwss.does_plane_fit_in_mall(dc, plane->plane_size.surface_pitch,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

976

plane->plane_size.surface_size.height, plane->format,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3735

struct plane_size size = plane_state->plane_size;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

165

struct plane_size plane_size;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1945

struct plane_size plane_size,

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

214

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h

168

struct plane_size *plane_size,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1698

memcpy(&phantom_plane->plane_size, &curr_pipe->plane_state->plane_size,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1699

sizeof(phantom_plane->plane_size));

drivers/gpu/drm/i915/display/intel_fb.c

1912

unsigned int plane_size;

drivers/gpu/drm/i915/display/intel_fb.c

1915

plane_size = rem_info->plane[i].size;

drivers/gpu/drm/i915/display/intel_fb.c

1917

plane_size = rem_info->plane[i].dst_stride * rem_info->plane[i].height;

drivers/gpu/drm/i915/display/intel_fb.c

1919

if (plane_size == 0)

drivers/gpu/drm/i915/display/intel_fb.c

1925

size += plane_size;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

106

layout->plane_size[2] = round_up(layout->plane_pitch[2] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

114

layout->plane_size[3] = round_up(layout->plane_pitch[3] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

121

layout->plane_size[0] = round_up(layout->plane_pitch[0] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

136

layout->plane_size[2] = round_up(layout->plane_pitch[2] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

152

layout->plane_size[0] = fb->width * fb->height * fmt->bpp;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

173

layout->plane_size[0] = layout->plane_pitch[0] * fb->height;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

174

layout->plane_size[1] = layout->plane_pitch[1] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

178

layout->plane_size[1] *= 2;

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

182

layout->plane_size[2] = layout->plane_size[1];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

248

layout->total_size += layout->plane_size[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

288

layout->plane_addr[0] = base_addr + layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

291

layout->plane_addr[1] = base_addr + layout->plane_size[0]

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

292

+ layout->plane_size[2] + layout->plane_size[3];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

301

layout->plane_addr[3] = base_addr + layout->plane_size[0]

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

302

+ layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

322

layout->plane_addr[0] = base_addr + layout->plane_size[2];

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

91

layout->plane_size[0] = round_up(layout->plane_pitch[0] *

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

95

layout->plane_size[1] = round_up(layout->plane_pitch[1] *

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

328

uint32_t plane_size[DPU_MAX_PLANES];

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

797

__entry->layout.plane_size[0],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

799

__entry->layout.plane_size[1],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

801

__entry->layout.plane_size[2],

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

803

__entry->layout.plane_size[3], __entry->multirect_index)

drivers/media/platform/mediatek/mdp/mtk_mdp_ipi.h

99

int32_t plane_size[MTK_MDP_MAX_NUM_PLANE];

drivers/media/platform/mediatek/mdp/mtk_mdp_regs.c

101

src_buf->plane_size[i] = frame->payload[i];

drivers/media/platform/mediatek/mdp/mtk_mdp_regs.c

131

dst_buf->plane_size[i] = frame->payload[i];

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1073

unsigned int bpl, plane_size;

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1078

plane_size = bpl * f->fmt.pix_mp.height *

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1084

plane_size = max(p->sizeimage, plane_size >> 3);

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1087

p->sizeimage = plane_size;

drivers/media/test-drivers/vivid/vivid-sdr-cap.c

522

unsigned long plane_size = vb2_plane_size(&buf->vb.vb2_buf, 0);

drivers/media/test-drivers/vivid/vivid-sdr-cap.c

534

for (i = 0; i < plane_size; i += 2) {

drivers/media/usb/pwc/pwc-dec23.c

656

unsigned int plane_size;

drivers/media/usb/pwc/pwc-dec23.c

662

plane_size = pdev->height * pdev->width;

drivers/media/usb/pwc/pwc-dec23.c

665

pout_planar_u = dst + plane_size;

drivers/media/usb/pwc/pwc-dec23.c

666

pout_planar_v = dst + plane_size + plane_size / 4;