drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

40

pg_cntl_dcn->pg_cntl_shift->field_name, pg_cntl_dcn->pg_cntl_mask->field_name

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

542

const struct pg_cntl_shift *pg_cntl_shift,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

558

pg_cntl_dcn->pg_cntl_shift = pg_cntl_shift;

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h

168

const struct pg_cntl_shift *pg_cntl_shift;

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h

190

const struct pg_cntl_shift *pg_cntl_shift,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2050

pool->base.pg_cntl = pg_cntl35_create(ctx, &pg_cntl_regs, &pg_cntl_shift, &pg_cntl_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

540

static const struct pg_cntl_shift pg_cntl_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

2022

pool->base.pg_cntl = pg_cntl35_create(ctx, &pg_cntl_regs, &pg_cntl_shift, &pg_cntl_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

520

static const struct pg_cntl_shift pg_cntl_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

2029

pool->base.pg_cntl = pg_cntl35_create(ctx, &pg_cntl_regs, &pg_cntl_shift, &pg_cntl_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

527

static const struct pg_cntl_shift pg_cntl_shift = {