arch/parisc/include/asm/cache.h

48

extern struct pdc_cache_info cache_info;

arch/parisc/include/asm/pdc.h

45

int pdc_cache_info(struct pdc_cache_info *cache);

arch/parisc/kernel/asm-offsets.c

236

DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base));

arch/parisc/kernel/asm-offsets.c

237

DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride));

arch/parisc/kernel/asm-offsets.c

238

DEFINE(ICACHE_COUNT, offsetof(struct pdc_cache_info, ic_count));

arch/parisc/kernel/asm-offsets.c

239

DEFINE(ICACHE_LOOP, offsetof(struct pdc_cache_info, ic_loop));

arch/parisc/kernel/asm-offsets.c

240

DEFINE(DCACHE_BASE, offsetof(struct pdc_cache_info, dc_base));

arch/parisc/kernel/asm-offsets.c

241

DEFINE(DCACHE_STRIDE, offsetof(struct pdc_cache_info, dc_stride));

arch/parisc/kernel/asm-offsets.c

242

DEFINE(DCACHE_COUNT, offsetof(struct pdc_cache_info, dc_count));

arch/parisc/kernel/asm-offsets.c

243

DEFINE(DCACHE_LOOP, offsetof(struct pdc_cache_info, dc_loop));

arch/parisc/kernel/asm-offsets.c

244

DEFINE(ITLB_SID_BASE, offsetof(struct pdc_cache_info, it_sp_base));

arch/parisc/kernel/asm-offsets.c

245

DEFINE(ITLB_SID_STRIDE, offsetof(struct pdc_cache_info, it_sp_stride));

arch/parisc/kernel/asm-offsets.c

246

DEFINE(ITLB_SID_COUNT, offsetof(struct pdc_cache_info, it_sp_count));

arch/parisc/kernel/asm-offsets.c

247

DEFINE(ITLB_OFF_BASE, offsetof(struct pdc_cache_info, it_off_base));

arch/parisc/kernel/asm-offsets.c

248

DEFINE(ITLB_OFF_STRIDE, offsetof(struct pdc_cache_info, it_off_stride));

arch/parisc/kernel/asm-offsets.c

249

DEFINE(ITLB_OFF_COUNT, offsetof(struct pdc_cache_info, it_off_count));

arch/parisc/kernel/asm-offsets.c

250

DEFINE(ITLB_LOOP, offsetof(struct pdc_cache_info, it_loop));

arch/parisc/kernel/asm-offsets.c

251

DEFINE(DTLB_SID_BASE, offsetof(struct pdc_cache_info, dt_sp_base));

arch/parisc/kernel/asm-offsets.c

252

DEFINE(DTLB_SID_STRIDE, offsetof(struct pdc_cache_info, dt_sp_stride));

arch/parisc/kernel/asm-offsets.c

253

DEFINE(DTLB_SID_COUNT, offsetof(struct pdc_cache_info, dt_sp_count));

arch/parisc/kernel/asm-offsets.c

254

DEFINE(DTLB_OFF_BASE, offsetof(struct pdc_cache_info, dt_off_base));

arch/parisc/kernel/asm-offsets.c

255

DEFINE(DTLB_OFF_STRIDE, offsetof(struct pdc_cache_info, dt_off_stride));

arch/parisc/kernel/asm-offsets.c

256

DEFINE(DTLB_OFF_COUNT, offsetof(struct pdc_cache_info, dt_off_count));

arch/parisc/kernel/asm-offsets.c

257

DEFINE(DTLB_LOOP, offsetof(struct pdc_cache_info, dt_loop));

arch/parisc/kernel/cache.c

181

if (pdc_cache_info(&cache_info) < 0)

arch/parisc/kernel/cache.c

71

struct pdc_cache_info cache_info __ro_after_init;

arch/parisc/kernel/firmware.c

656

int pdc_cache_info(struct pdc_cache_info *cache_info)