mtrr_wrmsr
mtrr_wrmsr(MTRRphysMask_MSR(reg), 0, 0);
mtrr_wrmsr(MTRRphysBase_MSR(reg), vr->base_lo, vr->base_hi);
mtrr_wrmsr(MTRRphysMask_MSR(reg), vr->mask_lo, vr->mask_hi);
mtrr_wrmsr(MSR_AMD64_SYSCFG, lo, hi);
mtrr_wrmsr(msr, msrwords[0], msrwords[1]);
mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
mtrr_wrmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);
mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & MTRR_DEF_TYPE_DISABLE, deftype_hi);
mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
void mtrr_wrmsr(unsigned, unsigned, unsigned);