modulo
#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
val |= SSPA_AUD_PLL_CTRL0_DIV_OCLK_MODULO(postdivs[postdiv].modulo);
val |= SSPA_AUD_PLL_CTRL0_DIV_OCLK_MODULO(postdivs[postdiv].modulo);
unsigned char modulo;
size_t modulo = DMA_CYCLIC_MAX_PERIOD;
if (avail > modulo)
num += DIV_ROUND_UP(avail, modulo) - 1;
if (period_len < modulo)
modulo = period_len;
len = min_t(size_t, avail, modulo);
u32 modulo, burst_size;
modulo = residue % burst_size;
if (modulo)
residue = residue - modulo + burst_size;
u32 cisr, clar, cbndtr, residue, modulo, burst_size;
modulo = residue % burst_size;
if (modulo)
residue = residue - modulo + burst_size;
int modulo, phase;
modulo = 0xff; // use FF at the end
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
DPPCLK0_DTO_MODULO, modulo);
int modulo = ref_dppclk / 10000;
if (phase > modulo) {
phase = modulo;
DPPCLK0_DTO_MODULO, modulo);
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
phase = div_u64((((unsigned long long)modulo * req_dtbclk_khz) + params->ref_dtbclk_khz - 1),
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
int modulo, phase;
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
phase = div_u64((((unsigned long long)modulo * params->req_audio_dtbclk_khz) + params->ref_dtbclk_khz - 1),
REG_WRITE(DCCG_AUDIO_DTBCLK_DTO_MODULO, modulo);
modulo = 0xff; // use FF at the end
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
DPPCLK0_DTO_MODULO, modulo);
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
int modulo, phase;
modulo = 0xff; // use FF at the end
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
DPPCLK0_DTO_MODULO, modulo);
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
params->ref_dtbclk_khz, req_dtbclk_khz, phase, modulo);
int modulo, phase;
modulo = 0xff; // use FF at the end
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
DPPCLK0_DTO_MODULO, modulo);
uint32_t modulo, phase;
modulo = params->ref_dtbclk_khz * 1000;
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
int modulo, phase;
modulo = 0xff; // use FF at the end
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
DPPCLK0_DTO_MODULO, modulo);
uint64_t modulo[MAX_PIPES];
modulo[i] = dp_ref_clk_100hz*100;
modulo[i] = (uint64_t)dp_ref_clk_100hz*
&modulo[i], true) == false) {
phase[i], modulo[i]);
de_h_begin = modulo(readl_relaxed(priv->io_base +
de_h_end = modulo(de_h_begin + active_pixels_venc,
hs_end = modulo(hs_begin + hsync_pixels_venc,
vso_begin_odd = modulo(hs_begin
vso_begin_evn = modulo(hs_begin
de_h_begin = modulo(readl_relaxed(priv->io_base +
de_h_end = modulo(de_h_begin + active_pixels_venc,
hs_end = modulo(hs_begin + hsync_pixels_venc,
vs_eline_evn = modulo(vs_bline_evn + vsync_lines,
vso_begin_odd = modulo(hs_begin
u8 modulo;
u32 bits = (i % M0209E.modulo) * M0209E.bits;
info->modulo = nvbios_rd08(bios, data + 0x01);
reg_907 = (bw->pll_bypass << 15) | (bw->modulo << 7) |
dib7000m_write_word(state, 910, (1 << 12) | (2 << 10) | (bw->modulo << 8) | (bw->ADClkSrc << 7));
(bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0);
(pll->modulo << 8) |
(pll->modulo << 8) |
(3 << 10) | (pll->modulo << 8) |
dib8000_write_word(state, 904, (pll->modulo << 8));
u8 modulo;
.modulo = 2,
.modulo = 2,
.modulo = 2,
.modulo = 2,
.modulo = 2,
.modulo = 2,
.modulo = 2,
.modulo = 0,
.modulo = 0,
.modulo = 0,
.modulo = 2,
int modulo, int pict_struct, enum mpeg_frame_type frame)
int modulo, enum mpeg_frame_type frame)
if (modulo)
if (state(hdlc)->settings.modulo == 128)
new_settings.modulo = 8;
(new_settings.modulo != 8 &&
new_settings.modulo != 128) ||
(new_settings.modulo == 8 &&
(new_settings.modulo == 128 &&
(unsigned long long)modulo(permille_failed, 10),
(unsigned long long)modulo(average_tries, 100));
int count, modulo;
modulo = abs(sdebug_every_nth);
if (modulo < 2)
atomic_set(&sdebug_cmnd_count, (count / modulo) * modulo);
unsigned int modulo; /* modulo (8 = basic / 128 = extended) */
return bch->a_pow_tab[modulo(bch, i)];
roots[n++] = modulo(bch, 2*GF_N(bch)-l1-
roots[n++] = modulo(bch, 2*GF_N(bch)-l1-