mem_reg
uint64_t mem_reg:2;
uint64_t mem_reg:2;
static const struct mem_reg openpic_gbl_mmio = {
static const struct mem_reg openpic_tmr_mmio = {
static const struct mem_reg openpic_cpu_mmio = {
static const struct mem_reg openpic_src_mmio = {
static const struct mem_reg openpic_msi_mmio = {
static const struct mem_reg openpic_summary_mmio = {
static void add_mmio_region(struct openpic *opp, const struct mem_reg *mr)
const struct mem_reg *mr = opp->mmio_regions[i];
const struct mem_reg *mr = opp->mmio_regions[i];
const struct mem_reg *mmio_regions[MAX_MMIO_REGIONS];
struct pci_mem_region *mem_reg = &hdev->pci_mem_region[PCI_REGION_CFG];
if (addr >= mem_reg->region_base &&
mem_reg->region_size >= access_size &&
addr <= mem_reg->region_base + mem_reg->region_size - access_size) {
struct pci_mem_region *mem_reg;
mem_reg = &hdev->pci_mem_region[i];
if (!mem_reg->used)
if (addr >= mem_reg->region_base &&
addr <= mem_reg->region_base + mem_reg->region_size - acc_size) {
mem_reg = &iser_task->rdma_reg[ISER_DIR_OUT];
hdr->write_stag = cpu_to_be32(mem_reg->rkey);
hdr->write_va = cpu_to_be64(mem_reg->sge.addr + unsol_sz);
task->itt, mem_reg->rkey,
(unsigned long long)mem_reg->sge.addr, unsol_sz);
tx_dsg->addr = mem_reg->sge.addr;
tx_dsg->lkey = mem_reg->sge.lkey;
struct iser_mem_reg *mem_reg;
mem_reg = &iser_task->rdma_reg[ISER_DIR_OUT];
tx_dsg->addr = mem_reg->sge.addr + buf_offset;
tx_dsg->lkey = mem_reg->sge.lkey;
struct iser_mem_reg *mem_reg;
mem_reg = &iser_task->rdma_reg[ISER_DIR_IN];
hdr->read_stag = cpu_to_be32(mem_reg->rkey);
hdr->read_va = cpu_to_be64(mem_reg->sge.addr);
task->itt, mem_reg->rkey,
(unsigned long long)mem_reg->sge.addr);
struct iser_mem_reg *mem_reg;
u32 edc_size, mc_size, mem_reg;
mem_reg = t4_read_reg(adap,
if (mem_reg == 0xffffffff)
*mem_aperture = 1 << (WINDOW_G(mem_reg) + WINDOW_SHIFT_X);
*mem_base = PCIEOFST_G(mem_reg) << PCIEOFST_SHIFT_X;
size = struct_size(rcvd_regions, mem_reg, num_regions);
le64_to_cpu(rcvd_regions->mem_reg[i].size);
le64_to_cpu(rcvd_regions->mem_reg[i].start_offset);
struct virtchnl2_mem_region mem_reg[];
u32 edc_size, mc_size, win_pf, mem_reg, mem_aperture, mem_base;
mem_reg = csio_rd_reg32(hw,
mem_aperture = 1 << (WINDOW_V(mem_reg) + 10);
mem_base = PCIEOFST_G(mem_reg) << 10;
mem_reg, mem_aperture);
struct bpf_reg_state *mem_reg,
err = check_helper_mem_access(env, mem_reg, mem_argno, reg_umax(size_reg),
static int check_kfunc_mem_size_reg(struct bpf_verifier_env *env, struct bpf_reg_state *mem_reg,
bool may_be_null = type_may_be_null(mem_reg->type);
saved_reg = *mem_reg;
mark_ptr_not_null_reg(mem_reg);
err = check_mem_size_reg(env, mem_reg, size_reg, mem_argno, size_argno, BPF_READ, true, &meta);
err = err ?: check_mem_size_reg(env, mem_reg, size_reg, mem_argno, size_argno, BPF_WRITE, true, &meta);
*mem_reg = saved_reg;