arch/m68k/coldfire/dma_timer.c

62

mcf_write16(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);

arch/m68k/coldfire/intc-2.c

172

mcf_write16(pa, MCFEPORT_EPPAR);

arch/m68k/coldfire/intc-simr.c

156

mcf_write16(pa, MCFEPORT_EPPAR);

arch/m68k/coldfire/intc.c

49

mcf_write16(imr | (0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

56

mcf_write16(imr & ~(0x1 << index), MCFSIM_IMR);

arch/m68k/coldfire/intc.c

64

mcf_write16(imr, MCFSIM_IMR);

arch/m68k/coldfire/m520x.c

132

mcf_write16(par, MCF_GPIO_PAR_UART);

arch/m68k/coldfire/m520x.c

162

mcf_write16(par, MCF_GPIO_PAR_UART);

arch/m68k/coldfire/m523x.c

58

mcf_write16(par, MCFGPIO_PAR_TIMER);

arch/m68k/coldfire/m5272.c

73

mcf_write16(0, MCFSIM_WIRR);

arch/m68k/coldfire/m5272.c

74

mcf_write16(1, MCFSIM_WRRR);

arch/m68k/coldfire/m5272.c

75

mcf_write16(0, MCFSIM_WCR);

arch/m68k/coldfire/m527x.c

105

mcf_write16(sepmask, MCFGPIO_PAR_UART);

arch/m68k/coldfire/m527x.c

122

mcf_write16(par | 0xf00, MCFGPIO_PAR_FECI2C);

arch/m68k/coldfire/m527x.c

128

mcf_write16(par | 0xa0, MCFGPIO_PAR_FECI2C);

arch/m68k/coldfire/m527x.c

61

mcf_write16(par, MCFGPIO_PAR_TIMER);

arch/m68k/coldfire/m527x.c

64

mcf_write16(0x003e, MCFGPIO_PAR_QSPI);

arch/m68k/coldfire/m527x.c

89

mcf_write16(par, MCFGPIO_PAR_FECI2C);

arch/m68k/coldfire/m528x.c

113

mcf_write16(mcf_read16(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR);

arch/m68k/coldfire/m528x.c

69

mcf_write16(paspar, MCFGPIO_PASPAR);

arch/m68k/coldfire/m528x.c

93

mcf_write16(v16 | 0xf00, MCFGPIO_PASPAR);

arch/m68k/coldfire/m53xx.c

169

mcf_write16(0x01f0, MCFGPIO_PAR_QSPI);

arch/m68k/coldfire/m53xx.c

191

mcf_write16(mcf_read16(MCFGPIO_PAR_UART) | 0x0FFF, MCFGPIO_PAR_UART);

arch/m68k/coldfire/m53xx.c

308

mcf_write16(0, MCF_WTM_WCR);

arch/m68k/coldfire/m53xx.c

344

mcf_write16(0xffff, 0x10080000);

arch/m68k/coldfire/m53xx.c

458

mcf_write16(MCF_GPIO_PAR_UART_PAR_URXD0 | MCF_GPIO_PAR_UART_PAR_UTXD0,

arch/m68k/coldfire/m53xx.c

560

mcf_write16(MCF_CCM_CDR_LPDIV(div) | MCF_CCM_CDR_SSIDIV(temp), MCF_CCM_CDR);

arch/m68k/coldfire/m53xx.c

562

mcf_write16(mcf_read16(MCF_CCM_MISCCR) | MCF_CCM_MISCCR_LIMP, MCF_CCM_MISCCR);

arch/m68k/coldfire/m53xx.c

572

mcf_write16(mcf_read16(MCF_CCM_MISCCR) & ~MCF_CCM_MISCCR_LIMP, MCF_CCM_MISCCR);

arch/m68k/coldfire/nettel.c

109

mcf_write16(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);

arch/m68k/coldfire/nettel.c

110

mcf_write16(macp[0], ioaddr + SMC91xx_BASEMAC);

arch/m68k/coldfire/nettel.c

111

mcf_write16(macp[1], ioaddr + SMC91xx_BASEMAC + 2);

arch/m68k/coldfire/nettel.c

112

mcf_write16(macp[2], ioaddr + SMC91xx_BASEMAC + 4);

arch/m68k/coldfire/nettel.c

125

mcf_write16(0x00ec, MCFSIM_PADDR);

arch/m68k/coldfire/nettel.c

127

mcf_write16(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);

arch/m68k/coldfire/nettel.c

128

mcf_write16(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);

arch/m68k/coldfire/nettel.c

132

mcf_write16(0x1180, MCFSIM_CSCR3);

arch/m68k/coldfire/pci.c

112

mcf_write16(cpu_to_le16(value), addr);

arch/m68k/coldfire/pci.c

189

mcf_write16(0x3ff, MCFGPIO_PAR_PCIBG);

arch/m68k/coldfire/pci.c

190

mcf_write16(0x3ff, MCFGPIO_PAR_PCIBR);

arch/m68k/coldfire/pit.c

105

mcf_write16(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));

arch/m68k/coldfire/pit.c

48

mcf_write16(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));

arch/m68k/coldfire/pit.c

49

mcf_write16(PIT_CYCLES_PER_JIFFY, TA(MCFPIT_PMR));

arch/m68k/coldfire/pit.c

50

mcf_write16(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE |

arch/m68k/coldfire/pit.c

58

mcf_write16(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));

arch/m68k/coldfire/pit.c

59

mcf_write16(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE |

arch/m68k/coldfire/pit.c

66

mcf_write16(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));

arch/m68k/coldfire/pit.c

78

mcf_write16(delta, TA(MCFPIT_PMR));

arch/m68k/coldfire/stmark2.c

133

mcf_write16(val, MCF_CCM_MISCCR2);

arch/m68k/coldfire/timers.c

114

mcf_write16(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));

arch/m68k/coldfire/timers.c

123

mcf_write16(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |

arch/m68k/coldfire/timers.c

177

mcf_write16(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));

arch/m68k/coldfire/timers.c

180

mcf_write16(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |

arch/m68k/coldfire/timers.c

45

#define mcf_writetrr mcf_write16

arch/m68k/include/asm/mcfgpio.h

108

#define mcfgpio_write(data, port) mcf_write16(data, port)

arch/m68k/include/asm/nettel.h

95

mcf_write16((mcf_read16(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);