arch/powerpc/platforms/44x/pci.c

1001

while (!(mfdcri(SDR0, PESDR1_460EX_RSTSTA) & 0x1))

arch/powerpc/platforms/44x/pci.c

1007

(mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) &

arch/powerpc/platforms/44x/pci.c

1086

mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |

arch/powerpc/platforms/44x/pci.c

1096

(mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) &

arch/powerpc/platforms/44x/pci.c

1188

if (((mfdcri(SDR0, PESDR1_460SX_HSSCTLSET) & 0x00000001) ==

arch/powerpc/platforms/44x/pci.c

666

val = mfdcri(SDR0, port->sdr_base + sdr_offset);

arch/powerpc/platforms/44x/pci.c

728

if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) {

arch/powerpc/platforms/44x/pci.c

741

valPE0 = mfdcri(SDR0, PESDR0_440SPE_RCSSET);

arch/powerpc/platforms/44x/pci.c

742

valPE1 = mfdcri(SDR0, PESDR1_440SPE_RCSSET);

arch/powerpc/platforms/44x/pci.c

743

valPE2 = mfdcri(SDR0, PESDR2_440SPE_RCSSET);

arch/powerpc/platforms/44x/pci.c

808

if (!(mfdcri(SDR0, PESDR0_PLLLCT2) & 0x10000)) {

arch/powerpc/platforms/44x/pci.c

811

mfdcri(SDR0, PESDR0_PLLLCT2));

arch/powerpc/platforms/44x/pci.c

820

if (!(mfdcri(SDR0, PESDR0_PLLLCT3) & 0x10000000)) {

arch/powerpc/platforms/44x/pci.c

990

mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |

arch/powerpc/platforms/44x/pci.c

997

while (!(mfdcri(SDR0, PESDR0_460EX_RSTSTA) & 0x1))

drivers/crypto/amcc/crypto4xx_core.c

1300

mfdcri(SDR0, PPC460EX_SDR0_SRST) | PPC460EX_CE_RESET);

drivers/crypto/amcc/crypto4xx_core.c

1302

mfdcri(SDR0, PPC460EX_SDR0_SRST) & ~PPC460EX_CE_RESET);

drivers/crypto/amcc/crypto4xx_core.c

1307

mfdcri(SDR0, PPC405EX_SDR0_SRST) | PPC405EX_CE_RESET);

drivers/crypto/amcc/crypto4xx_core.c

1309

mfdcri(SDR0, PPC405EX_SDR0_SRST) & ~PPC405EX_CE_RESET);

drivers/crypto/amcc/crypto4xx_core.c

1315

mfdcri(SDR0, PPC460SX_SDR0_SRST) | PPC460SX_CE_RESET);

drivers/crypto/amcc/crypto4xx_core.c

1317

mfdcri(SDR0, PPC460SX_SDR0_SRST) & ~PPC460SX_CE_RESET);

drivers/net/ethernet/ibm/emac/mal.c

286

(mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX));

drivers/net/ethernet/ibm/emac/mal.c

306

(mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX));