memblock_start_of_DRAM
memblock_remove(memblock_start_of_DRAM(),
memblock_end_of_DRAM() - memblock_start_of_DRAM());
mem_start = memblock_start_of_DRAM();
*min = PFN_UP(memblock_start_of_DRAM());
tag_lsb = fls64((u64)phys_to_virt(memblock_start_of_DRAM()) ^
if (memblock_start_of_DRAM() < U32_MAX)
memstart_addr = round_down(memblock_start_of_DRAM(),
if (WARN(base < memblock_start_of_DRAM() ||
base + size > memblock_start_of_DRAM() +
min = PFN_UP(memblock_start_of_DRAM());
min_low_pfn = PFN_UP(memblock_start_of_DRAM());
phys_addr_t start = memblock_start_of_DRAM();
memblock_remove(memblock_start_of_DRAM(),
memblock_end_of_DRAM() - memblock_start_of_DRAM());
if (addr >= (u32)memblock_start_of_DRAM() &&
ramstart = memblock_start_of_DRAM();
memblock_remove(memblock_start_of_DRAM(),
memblock_end_of_DRAM() - memblock_start_of_DRAM());
*min = PFN_UP(memblock_start_of_DRAM());
memory_start = memblock_start_of_DRAM();
memory_start = memblock_start_of_DRAM();
phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
min_low_pfn = PFN_UP(memblock_start_of_DRAM());
phys_addr_t start = memblock_start_of_DRAM();
return memblock_start_of_DRAM() + SZ_4G;
phys_addr_t memblock_start_of_DRAM(void);
start_pfn = PHYS_PFN(memblock_start_of_DRAM());
const u64 low = memblock_start_of_DRAM();
r2.base = memblock_start_of_DRAM() + gap_size;
region_end = memblock_start_of_DRAM();
memblock_reserve(memblock_start_of_DRAM(), MEM_SIZE);
memblock_reserve(memblock_start_of_DRAM(), reserved_size);
memblock_reserve_kern(memblock_start_of_DRAM(), reserved_size);
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
r1.base = memblock_start_of_DRAM() + SZ_2;
expected_start = memblock_start_of_DRAM() + alignment;
memblock_reserve_kern(memblock_start_of_DRAM() + r1_size, r2_size);
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
r1.base = memblock_start_of_DRAM() + SMP_CACHE_BYTES;
r1.base = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
r1.base = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
start_addr = (phys_addr_t)memblock_start_of_DRAM();
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
min_addr = memblock_start_of_DRAM() + SZ_128;
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
start_addr = (phys_addr_t)memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM() + SZ_1K;
min_addr = memblock_start_of_DRAM();
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM() + SMP_CACHE_BYTES * 2;
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM() + SMP_CACHE_BYTES;
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM() + SZ_512;
min_addr = memblock_start_of_DRAM();
r1.base = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM();
r2.base = memblock_start_of_DRAM();
min_addr = memblock_start_of_DRAM() - SZ_256;
min_addr = memblock_start_of_DRAM() + SMP_CACHE_BYTES * 2;
min_addr = memblock_start_of_DRAM() + SMP_CACHE_BYTES * 2;
min_addr = memblock_start_of_DRAM() + misalign;
min_addr = memblock_start_of_DRAM() + SZ_512;
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
ASSERT_EQ(rgn3->base, memblock_start_of_DRAM());
memblock_set_node(memblock_start_of_DRAM(),
memblock_set_node(memblock_start_of_DRAM() + memblock_phys_mem_size() / 2,
ASSERT_EQ(rgn->base, memblock_start_of_DRAM());
ASSERT_EQ(rgn->base, memblock_start_of_DRAM() + memblock_phys_mem_size() / 2);
memblock_reserve(memblock_start_of_DRAM() + SZ_16 * i, SZ_8);
memblock_reserve(memblock_start_of_DRAM() + memblock_phys_mem_size() / 2 - SZ_8,