drivers/mailbox/omap-mailbox.c

119

mbox_write_reg(mbox->parent, msg, fifo->msg);

drivers/mailbox/omap-mailbox.c

144

mbox_write_reg(mbox->parent, bit, irqstatus);

drivers/mailbox/omap-mailbox.c

174

mbox_write_reg(mbox->parent, l, irqenable);

drivers/mailbox/omap-mailbox.c

191

mbox_write_reg(mbox->parent, bit, irqdisable);

drivers/mailbox/omap-mailbox.c

373

mbox_write_reg(mdev, mdev->irq_ctx[usr], reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

525

val64 = readq(oct->mbox[q_no]->mbox_write_reg);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c

570

mbox->mbox_write_reg = (u8 *)oct->mmio[0].hw_addr +

drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c

301

mbox->mbox_write_reg =

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

163

while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) {

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

172

writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg);

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

175

while (readq(mbox->mbox_write_reg) !=

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c

184

writeq(mbox_cmd->data[i], mbox->mbox_write_reg);

drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h

102

void *mbox_write_reg;

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cn9k.c

257

mbox->mbox_write_reg = oct->mmio.hw_addr + CN93_VF_SDP_R_MBOX_VF_PF_DATA(q_no);

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cnxk.c

300

mbox->mbox_write_reg = oct->mmio.hw_addr + CNXK_VF_SDP_R_MBOX_VF_PF_DATA(q_no);

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h

107

u8 __iomem *mbox_write_reg;

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c

124

writeq(cmd.u64, mbox->mbox_write_reg);

drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c

132

reg_val = readq(mbox->mbox_write_reg);