CLK_GATE_SET_TO_DISABLE
int set = gate_hw->gate_flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
if (gate_hw->gate_flags & CLK_GATE_SET_TO_DISABLE)
u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? clk : 0;
gate_flags = (gd->clock_idx == 14) ? 0 : CLK_GATE_SET_TO_DISABLE;
enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
if (gate->flags & CLK_GATE_SET_TO_DISABLE) {
if (gate->flags & CLK_GATE_SET_TO_DISABLE) {
gate_flags = (gd->clock_idx == 14) ? 0 : CLK_GATE_SET_TO_DISABLE;
CLK_GATE_SET_TO_DISABLE,
CLK_GATE_SET_TO_DISABLE,
if (gate->flags & CLK_GATE_SET_TO_DISABLE)
int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
CLK_GATE_SET_TO_DISABLE, NULL);
CLK_GATE_SET_TO_DISABLE, NULL);
CLK_GATE_SET_TO_DISABLE, NULL);
CLK_GATE_SET_TO_DISABLE,
CLK_SET_RATE_PARENT, 0x06c, 5, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x06c, 9, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x06c, 13, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x06c, 17, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x06c, 21, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x06c, 1, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x5c, 4, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x9c, 4, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0xa0, 4, CLK_GATE_SET_TO_DISABLE, },
CLK_SET_RATE_PARENT, 0x178, 4, CLK_GATE_SET_TO_DISABLE, },
gate->flags = CLK_GATE_SET_TO_DISABLE;
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
.flags2 = CLK_GATE_SET_TO_DISABLE,
__imx_clk_hw_gate(name, parent, reg, shift, flags, CLK_GATE_SET_TO_DISABLE)
gate->flags = CLK_GATE_SET_TO_DISABLE;
int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
if (gate->flags & CLK_GATE_SET_TO_DISABLE)
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE,
gate->flags = CLK_GATE_SET_TO_DISABLE;
reg, shift, CLK_GATE_SET_TO_DISABLE,
.flags = CLK_GATE_SET_TO_DISABLE, \
.flags = CLK_GATE_SET_TO_DISABLE, \
.flags = CLK_GATE_SET_TO_DISABLE, \
0, CLK_GATE_SET_TO_DISABLE, NULL);
LPC32XX_DEFINE_GATE(OSC, OSC_CTRL, 0, CLK_GATE_SET_TO_DISABLE),
LPC32XX_DEFINE_GATE(PERIPH, PWR_CTRL, 0, CLK_GATE_SET_TO_DISABLE),
LPC32XX_DEFINE_GATE(HCLK, PWR_CTRL, 0, CLK_GATE_SET_TO_DISABLE),
LPC32XX_DEFINE_GATE(ARM, PWR_CTRL, 0, CLK_GATE_SET_TO_DISABLE),
u32 val = (clk->flags & CLK_GATE_SET_TO_DISABLE ? 0x0 : mask);
u32 val = (clk->flags & CLK_GATE_SET_TO_DISABLE ? mask : 0x0);
return (clk->flags & CLK_GATE_SET_TO_DISABLE ? !is_set : is_set);
CLK_GATE_SET_TO_DISABLE, &vbclk->lock);
rpc->gate.flags = CLK_GATE_SET_TO_DISABLE;
rpcd2->gate.flags = CLK_GATE_SET_TO_DISABLE;
gate->flags = CLK_GATE_SET_TO_DISABLE;
gate->flags = CLK_GATE_SET_TO_DISABLE;
u32 val = !(gate->flags & CLK_GATE_SET_TO_DISABLE) ? BIT(gate->shift) : 0;
u32 val = !(gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : BIT(gate->shift);
bool invert = !!(gate->flags & CLK_GATE_SET_TO_DISABLE);
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
if (sg->flags & CLK_GATE_SET_TO_DISABLE)
bool set = sg->flags & CLK_GATE_SET_TO_DISABLE ? true : false;
bool set = sg->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
0x1000, BIT(0), CLK_IGNORE_UNUSED, CLK_GATE_SET_TO_DISABLE);
gate->flags = CLK_GATE_SET_TO_DISABLE;
CLK_GATE_SET_TO_DISABLE, NULL);
7, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
3, CLK_GATE_SET_TO_DISABLE, &sysrate_lock);
CLK_GATE_SET_TO_DISABLE, NULL);
OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);
0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
CLK_SET_RATE_PARENT, CLK_GATE_SET_TO_DISABLE)
CLK_SET_RATE_PARENT, CLK_GATE_SET_TO_DISABLE)
CLK_SET_RATE_PARENT, CLK_GATE_SET_TO_DISABLE)
CLK_GATE_SET_TO_DISABLE, &priv->lock);