irq_setup_generic_chip
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
irq_setup_generic_chip(gc, IRQ_MSK(ngpio), IRQ_GC_INIT_MASK_CACHE,
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR),
irq_setup_generic_chip(sd->gc, IRQ_MSK(SDV_NUM_PUB_GPIOS),
irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0,
irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
irq_setup_generic_chip(gc, msk, flags, clr, set);
EXPORT_SYMBOL_GPL(irq_setup_generic_chip);