irq_set_vcpu_affinity
.irq_set_vcpu_affinity = timer_irq_set_vcpu_affinity,
err = irq_set_vcpu_affinity(host_vtimer_irq,
err = irq_set_vcpu_affinity(host_ptimer_irq,
rc = irq_set_vcpu_affinity(host_irq, state);
rc = irq_set_vcpu_affinity(host_irq, NULL);
.irq_set_vcpu_affinity = xive_irq_set_vcpu_affinity,
ret = irq_set_vcpu_affinity(host_irq, &pi_data);
irq_set_vcpu_affinity(host_irq, NULL);
return irq_set_vcpu_affinity(host_irq, NULL);
return irq_set_vcpu_affinity(host_irq, &pi_data);
return irq_set_vcpu_affinity(host_irq, NULL);
.irq_set_vcpu_affinity = amd_ir_set_vcpu_affinity,
.irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
.irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
.irq_set_vcpu_affinity = its_irq_set_vcpu_affinity,
.irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity,
.irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity,
.irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity,
.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
return irq_set_vcpu_affinity(vpe->irq, info);
ret = irq_set_vcpu_affinity(irq, &info);
return irq_set_vcpu_affinity(irq, &info);
WARN_ON_ONCE(irq_set_vcpu_affinity(irq, NULL));
return irq_set_vcpu_affinity(irq, &info);
return irq_set_vcpu_affinity(irq, &info);
.irq_set_vcpu_affinity = gicv5_ppi_irq_set_vcpu_affinity,
.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
.irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
.irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity,
int (*irq_set_vcpu_affinity)(struct irq_data *data, void *vcpu_info);
extern int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info);
if (data->chip->irq_set_vcpu_affinity)
return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
if (chip && chip->irq_set_vcpu_affinity)
return chip->irq_set_vcpu_affinity(data, vcpu_info);
EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);