drivers/gpu/drm/i915/display/intel_ddi.c

1496

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

2598

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

2727

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

2874

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3144

if (is_mst || intel_dp_is_uhbr(old_crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3241

if (!is_hdmi && intel_dp_is_uhbr(old_crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3519

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3534

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

370

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

3750

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3803

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

499

if (enable && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

592

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

593

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1747

intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1766

if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1779

if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

2486

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

2959

if (!ret && intel_dp_is_uhbr(pipe_config))

drivers/gpu/drm/i915/display/intel_dp.c

3526

intel_dp_is_uhbr(pipe_config);

drivers/gpu/drm/i915/display/intel_dp.c

3566

int symbol_size = intel_dp_is_uhbr(crtc_state) ? 32 : 8;

drivers/gpu/drm/i915/display/intel_dp.c

3571

int min_sym_cycles = intel_dp_is_uhbr(crtc_state) ? 3 : 5;

drivers/gpu/drm/i915/display/intel_dp.c

3584

if (!is_mst && !intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

3628

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp.c

3696

if (intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp.c

3733

if (!intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp.h

92

bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1065

intel_dp_is_uhbr(crtc_state));

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1278

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1801

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1856

if (!intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

454

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

494

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

613

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

703

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

803

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

927

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

971

intel_dp_is_uhbr(crtc_state));

drivers/gpu/drm/i915/display/intel_dp_mst.c

1282

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1287

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1292

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1320

if (intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

150

if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

242

u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?

drivers/gpu/drm/i915/display/intel_psr.c

1861

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_psr.c

2890

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 1230 : 546;

drivers/gpu/drm/i915/display/intel_psr.c

2892

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 615 : 273;