drivers/gpu/drm/i915/gt/intel_rc6.c

852

return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(rc6, id), 1000);

drivers/gpu/drm/i915/gt/intel_rc6.h

25

u64 intel_rc6_residency_ns(struct intel_rc6 *rc6, enum intel_rc6_res_type id);

drivers/gpu/drm/i915/gt/selftest_rc6.c

23

result = intel_rc6_residency_ns(rc6, INTEL_RC6_RES_RC6);

drivers/gpu/drm/i915/gt/selftest_rc6.c

25

result += intel_rc6_residency_ns(rc6, INTEL_RC6_RES_RC6p);

drivers/gpu/drm/i915/gt/selftest_rc6.c

27

result += intel_rc6_residency_ns(rc6, INTEL_RC6_RES_RC6pp);

drivers/gpu/drm/i915/i915_pmu.c

187

val = intel_rc6_residency_ns(&gt->rc6, INTEL_RC6_RES_RC6);

drivers/gpu/drm/i915/i915_pmu.c

190

val += intel_rc6_residency_ns(&gt->rc6, INTEL_RC6_RES_RC6p);

drivers/gpu/drm/i915/i915_pmu.c

193

val += intel_rc6_residency_ns(&gt->rc6, INTEL_RC6_RES_RC6pp);