init_params
struct kvm_nvhe_init_params *init_params;
init_params = per_cpu_ptr(&kvm_init_params, cpu_id);
__hyp_pa(init_params));
struct kvm_nvhe_init_params *init_params;
init_params = this_cpu_ptr(&kvm_init_params);
__hyp_pa(init_params));
struct kvm_nvhe_init_params *init_params;
init_params = this_cpu_ptr(&kvm_init_params);
__hyp_pa(init_params), 0);
struct dc_callback_init init_params;
memset(&init_params, 0, sizeof(init_params));
adev->dm.hdcp_workqueue = hdcp_create_workqueue(adev, &init_params.cp_psp, adev->dm.dc);
dc_init_callbacks(adev->dm.dc, &init_params);
struct dc_sink_init_data init_params = {
init_params.sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
&init_params);
struct dc_sink_init_data init_params = {
&init_params);
struct dc_sink_init_data init_params = {
&init_params);
const struct dc_init_data *init_params)
dc_ctx->cgs_device = init_params->cgs_device;
dc_ctx->driver_context = init_params->driver;
dc_ctx->asic_id = init_params->asic_id;
dc_ctx->dce_environment = init_params->dce_environment;
dc_ctx->dcn_reg_offsets = init_params->dcn_reg_offsets;
dc_ctx->nbio_reg_offsets = init_params->nbio_reg_offsets;
dc_ctx->clk_reg_offsets = init_params->clk_reg_offsets;
dc_ctx->logger->dev = adev_to_drm(init_params->driver);
dc_ctx->dce_version = resource_parse_asic_id(init_params->asic_id);
const struct dc_init_data *init_params)
dc->config = init_params->flags;
memcpy(&dc->bb_overrides, &init_params->bb_overrides, sizeof(dc->bb_overrides));
if (init_params->bb_from_dmub)
dc->dml2_options.bb_from_dmub = init_params->bb_from_dmub;
if (!dc_construct_ctx(dc, init_params)) {
if (init_params->vbios_override)
dc_ctx->dc_bios = init_params->vbios_override;
bp_init_data.bios = init_params->asic_id.atombios_base_address;
dc->vendor_signature = init_params->vendor_signature;
dc->res_pool = dc_create_resource_pool(dc, init_params, dc_ctx->dce_version);
dc->clk_mgr->force_smu_not_present = init_params->force_smu_not_present;
if (!create_links(dc, init_params->num_virtual_links))
struct dc *dc_create(const struct dc_init_data *init_params)
if (init_params->dce_environment == DCE_ENV_VIRTUAL_HW) {
if (!dc_construct_ctx(dc, init_params))
if (!dc_construct(dc, init_params))
dc->dcn_reg_offsets = init_params->dcn_reg_offsets;
dc->nbio_reg_offsets = init_params->nbio_reg_offsets;
dc->clk_reg_offsets = init_params->clk_reg_offsets;
const struct dc_callback_init *init_params)
dc->ctx->cp_psp = init_params->cp_psp;
static bool dc_sink_construct(struct dc_sink *sink, const struct dc_sink_init_data *init_params)
struct dc_link *link = init_params->link;
sink->sink_signal = init_params->sink_signal;
sink->dongle_max_pix_clk = init_params->dongle_max_pix_clk;
sink->converter_disable_audio = init_params->converter_disable_audio;
sink->sink_id = init_params->link->ctx->dc_sink_id_count;
init_params->link->ctx->dc_sink_id_count++;
struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params)
if (false == dc_sink_construct(sink, init_params))
struct dc *dc_create(const struct dc_init_data *init_params);
const struct dc_callback_init *init_params);
struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
l->vmin.init_params.instance = ¶ms->dml->pmo_instance;
l->vmin.init_params.base_display_config = params->display_config;
return params->dml->pmo_instance.init_for_vmin(&l->vmin.init_params);
l->uclk_pstate.init_params.instance = ¶ms->dml->pmo_instance;
l->uclk_pstate.init_params.base_display_config = params->display_config;
return params->dml->pmo_instance.init_for_uclk_pstate(&l->uclk_pstate.init_params);
l->uclk_pstate.init_params.instance = ¶ms->dml->pmo_instance;
l->uclk_pstate.init_params.base_display_config = params->display_config;
struct optimization_init_function_params init_params = { 0 };
init_params.locals = &l->init_function_locals;
init_params.dml = params->dml;
init_params.display_config = &l->cur_candidate_display_cfg;
if (params->init_function && !params->init_function(&init_params))
struct dml2_pmo_init_for_pstate_support_in_out init_params;
struct dml2_pmo_init_for_vmin_in_out init_params;
const struct link_init_data *init_params);
const struct link_init_data *init_params)
struct dc_context *dc_ctx = init_params->ctx;
struct dc_bios *bios = init_params->dc->ctx->dc_bios;
link->dc = init_params->dc;
link->link_index = init_params->link_index;
bios->funcs->get_connector_id(bios, init_params->connector_index);
__func__, init_params->connector_index,
init_params->connector_index,
const struct link_init_data *init_params)
struct dc_context *dc_ctx = init_params->ctx;
link->dc = init_params->dc;
link->link_index = init_params->link_index;
link->link_id.enum_id = ENUM_ID_1 + init_params->connector_index;
init_params->connector_index,
link->ddc_hw_inst = init_params->connector_index;
const struct link_init_data *init_params)
if (init_params->is_dpia_link == true)
return construct_dpia(link, init_params);
return construct_phy(link, init_params);
struct dc_link *link_create(const struct link_init_data *init_params)
if (false == link_construct(link, init_params))
struct dc_link *link_create(const struct link_init_data *init_params);
struct dmub_rb_init_params *init_params)
rb->base_address = init_params->base_address;
rb->capacity = init_params->capacity;
rb->rptr = init_params->read_ptr;
rb->wrpt = init_params->write_ptr;
struct mod_stats_init_params *init_params);
const struct brcmstb_intc_init_params *init_params)
writel(0xffffffff, base + init_params->cpu_mask_set);
if (!data->can_wake && (init_params->cpu_clear >= 0))
writel(0xffffffff, base + init_params->cpu_clear);
if (init_params->handler == handle_level_irq)
np->full_name, init_params->handler, clr, set, flags);
data->status_offset = init_params->cpu_status;
data->mask_offset = init_params->cpu_mask_status;
if (init_params->cpu_clear >= 0) {
ct->regs.ack = init_params->cpu_clear;
ct->regs.disable = init_params->cpu_mask_set;
ct->regs.mask = init_params->cpu_mask_status;
ct->regs.enable = init_params->cpu_mask_clear;
struct stv0900_init_params init_params;
init_params.dmd_ref_clk = config->xtal;
init_params.demod_mode = config->demod_mode;
init_params.rolloff = STV0900_35;
init_params.path1_ts_clock = config->path1_mode;
init_params.tun1_maddress = config->tun1_maddress;
init_params.tun1_iq_inv = STV0900_IQ_NORMAL;
init_params.tuner1_adc = config->tun1_adc;
init_params.tuner1_type = config->tun1_type;
init_params.path2_ts_clock = config->path2_mode;
init_params.ts_config = config->ts_config_regs;
init_params.tun2_maddress = config->tun2_maddress;
init_params.tuner2_adc = config->tun2_adc;
init_params.tuner2_type = config->tun2_type;
init_params.tun2_iq_inv = STV0900_IQ_SWAPPED;
&init_params);
struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params)
__set_bit(BNX2X_Q_FLG_HC, &init_params->rx.flags);
__set_bit(BNX2X_Q_FLG_HC, &init_params->tx.flags);
__set_bit(BNX2X_Q_FLG_HC_EN, &init_params->rx.flags);
__set_bit(BNX2X_Q_FLG_HC_EN, &init_params->tx.flags);
init_params->rx.hc_rate = bp->rx_ticks ?
init_params->tx.hc_rate = bp->tx_ticks ?
init_params->rx.fw_sb_id = init_params->tx.fw_sb_id =
init_params->rx.sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS;
init_params->tx.sb_cq_index = HC_INDEX_ETH_FIRST_TX_CQ_CONS;
init_params->max_cos = fp->max_cos;
fp->index, init_params->max_cos);
for (cos = FIRST_TX_COS_INDEX; cos < init_params->max_cos; cos++) {
init_params->cxts[cos] =
struct bnx2x_queue_init_params *init_params,
init_params->tx.sb_cq_index,
init_params->tx.hc_rate,
struct bnx2x_queue_init_params *init_params,
init_params->rx.sb_cq_index,
init_params->rx.hc_rate,
struct bnx2x_queue_init_params *init_params,
struct bnx2x_queue_init_params *init_params,
s32 (*init_params)(struct e1000_hw *hw);
rc = adapter->hw.mac.ops.init_params(&adapter->hw);
rc = adapter->hw.mbx.ops.init_params(&adapter->hw);
hw->mac.ops.init_params = e1000_init_mac_params_vf;
hw->mbx.ops.init_params = e1000_init_mbx_params_vf;
s32 (*init_params)(struct e1000_hw *);
s32 (*init_params)(struct e1000_hw *hw);
.init_params = &ixgbe_init_eeprom_params_generic,
.init_params = &ixgbe_init_eeprom_params_generic,
hw->eeprom.ops.init_params(hw);
hw->eeprom.ops.init_params(hw);
hw->eeprom.ops.init_params(hw);
hw->eeprom.ops.init_params(hw);
hw->eeprom.ops.init_params(hw);
hw->eeprom.ops.init_params(hw);
err = hw->eeprom.ops.init_params(hw);
err = hw->eeprom.ops.init_params(hw);
err = hw->eeprom.ops.init_params(hw);
.init_params = ixgbe_init_eeprom_params_e610,
if (hw->eeprom.ops.init_params(hw)) {
int (*init_params)(struct ixgbe_hw *hw);
int (*init_params)(struct ixgbe_hw *);
.init_params = &ixgbe_init_eeprom_params_X540,
hw->eeprom.ops.init_params(hw);
.init_params = &ixgbe_init_eeprom_params_X550,
.init_params = &ixgbe_init_eeprom_params_X540,
hw->mbx.ops.init_params(hw);
hw->mbx.ops.init_params(hw);
.init_params = ixgbevf_init_mbx_params_vf,
.init_params = ixgbevf_init_mbx_params_vf,
hw->mbx.ops.init_params(hw);
s32 (*init_params)(struct ixgbe_hw *hw);
const struct mlx5e_rss_init_params *init_params)
rqt_size = mlx5e_rqt_size(mdev, init_params->nch);
rqt_max_size = mlx5e_rqt_size(mdev, init_params->max_nch);
if (init_params->type == MLX5E_RSS_INIT_NO_TIRS)
err = mlx5e_rss_create_tirs(rss, init_params->pkt_merge_param,
init_params->pkt_merge_param,
const struct mlx5e_rss_init_params *init_params);
rss = mlx5e_rss_init(res->mdev, &rss_params, &init_params);
mlx5e_rss_set_indir_uniform(rss, init_params.nch);
struct mlx5e_rss_init_params init_params;
init_params = (struct mlx5e_rss_init_params) {
rss = mlx5e_rss_init(res->mdev, &rss_params, &init_params);
mlx5e_rss_set_indir_uniform(rss, init_params.nch);
struct mlx5e_rss_init_params init_params;
init_params = (struct mlx5e_rss_init_params) {
struct mlx5e_selq_params *init_params;
init_params = kvzalloc_obj(*selq->active);
if (!init_params) {
*init_params = (struct mlx5e_selq_params) {
rcu_assign_pointer(selq->active, init_params);
init_params(&p0, name, argc, argv);
init_params(&p0, "main,", argc, argv);
ret = init_params();