Symbol: imx_writel
arch/arm/mach-imx/avic.c
100
imx_writel(~gc->wake_active, mx25_ccm_base + offs);
arch/arm/mach-imx/avic.c
110
imx_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask);
arch/arm/mach-imx/avic.c
116
imx_writel(0xffffffff, mx25_ccm_base + offs);
arch/arm/mach-imx/avic.c
182
imx_writel(0xffffffff, mx25_ccm_base + MX25_CCM_LPIMR0);
arch/arm/mach-imx/avic.c
183
imx_writel(0xffffffff, mx25_ccm_base + MX25_CCM_LPIMR1);
arch/arm/mach-imx/avic.c
189
imx_writel(0, avic_base + AVIC_INTCNTL);
arch/arm/mach-imx/avic.c
190
imx_writel(0x1f, avic_base + AVIC_NIMASK);
arch/arm/mach-imx/avic.c
193
imx_writel(0, avic_base + AVIC_INTENABLEH);
arch/arm/mach-imx/avic.c
194
imx_writel(0, avic_base + AVIC_INTENABLEL);
arch/arm/mach-imx/avic.c
197
imx_writel(0, avic_base + AVIC_INTTYPEH);
arch/arm/mach-imx/avic.c
198
imx_writel(0, avic_base + AVIC_INTTYPEL);
arch/arm/mach-imx/avic.c
213
imx_writel(0, avic_base + AVIC_NIPRIORITY(i));
arch/arm/mach-imx/avic.c
61
imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL);
arch/arm/mach-imx/avic.c
65
imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH);
arch/arm/mach-imx/avic.c
89
imx_writel(gc->wake_active, avic_base + ct->regs.mask);
arch/arm/mach-imx/cpu.c
45
imx_writel(0x77777777, base + 0x0);
arch/arm/mach-imx/cpu.c
46
imx_writel(0x77777777, base + 0x4);
arch/arm/mach-imx/cpu.c
53
imx_writel(0x0, base + 0x40);
arch/arm/mach-imx/cpu.c
54
imx_writel(0x0, base + 0x44);
arch/arm/mach-imx/cpu.c
55
imx_writel(0x0, base + 0x48);
arch/arm/mach-imx/cpu.c
56
imx_writel(0x0, base + 0x4C);
arch/arm/mach-imx/cpu.c
58
imx_writel(reg, base + 0x50);
arch/arm/mach-imx/mach-imx51.c
35
imx_writel(0xf00, hsc_addr);
arch/arm/mach-imx/mach-imx51.c
38
imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
arch/arm/mach-imx/mm-imx3.c
132
imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);
arch/arm/mach-imx/mm-imx3.c
95
imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);
arch/arm/mach-imx/pm-imx27.c
33
imx_writel(cscr, ccm_base);
arch/arm/mach-imx/pm-imx5.c
194
imx_writel(plat_lpc, cortex_base + MXC_CORTEXA8_PLAT_LPC);
arch/arm/mach-imx/pm-imx5.c
195
imx_writel(ccm_clpcr, ccm_base + MXC_CCM_CLPCR);
arch/arm/mach-imx/pm-imx5.c
196
imx_writel(arm_srpgcr, gpc_base + MXC_SRPG_ARM_SRPGCR);
arch/arm/mach-imx/pm-imx5.c
197
imx_writel(arm_srpgcr, gpc_base + MXC_SRPG_NEON_SRPGCR);
arch/arm/mach-imx/pm-imx5.c
203
imx_writel(empgc0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR);
arch/arm/mach-imx/pm-imx5.c
204
imx_writel(empgc1, gpc_base + MXC_SRPG_EMPGC1_SRPGCR);
arch/arm/mach-imx/pm-imx5.c
226
imx_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR);
arch/arm/mach-imx/pm-imx5.c
227
imx_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR);
arch/arm/mach-imx/tzic.c
162
imx_writel(0x80010001, tzic_base + TZIC_INTCNTL);
arch/arm/mach-imx/tzic.c
163
imx_writel(0x1f, tzic_base + TZIC_PRIOMASK);
arch/arm/mach-imx/tzic.c
164
imx_writel(0x02, tzic_base + TZIC_SYNCCTRL);
arch/arm/mach-imx/tzic.c
167
imx_writel(0xFFFFFFFF, tzic_base + TZIC_INTSEC0(i));
arch/arm/mach-imx/tzic.c
171
imx_writel(0xFFFFFFFF, tzic_base + TZIC_ENCLEAR0(i));
arch/arm/mach-imx/tzic.c
211
imx_writel(1, tzic_base + TZIC_DSMINT);
arch/arm/mach-imx/tzic.c
216
imx_writel(imx_readl(tzic_base + TZIC_ENSET0(i)),
arch/arm/mach-imx/tzic.c
64
imx_writel(value, tzic_base + TZIC_INTSEC0(index));
arch/arm/mach-imx/tzic.c
78
imx_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx));
arch/arm/mach-imx/tzic.c
85
imx_writel(imx_readl(tzic_base + TZIC_ENSET0(idx)),