imx_readl
nivector = imx_readl(avic_base + AVIC_NIVECSR) >> 16;
irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq);
irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq);
avic_saved_mask_reg[idx] = imx_readl(avic_base + ct->regs.mask);
val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
srev = imx_readl(iim_base + MXC_IIMSREV);
rev = imx_readl(iim_base + MXC_IIMSREV);
reg = imx_readl(base + 0x50) & 0x00FFFFFF;
imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR);
int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR);
cscr = imx_readl(ccm_base);
plat_lpc = imx_readl(cortex_base + MXC_CORTEXA8_PLAT_LPC) &
ccm_clpcr = imx_readl(ccm_base + MXC_CCM_CLPCR) &
arm_srpgcr = imx_readl(gpc_base + MXC_SRPG_ARM_SRPGCR) &
empgc0 = imx_readl(gpc_base + MXC_SRPG_EMPGC0_SRPGCR) &
empgc1 = imx_readl(gpc_base + MXC_SRPG_EMPGC1_SRPGCR) &
stat = imx_readl(tzic_base + TZIC_HIPND(i)) &
imx_readl(tzic_base + TZIC_INTSEC0(i));
i = imx_readl(tzic_base + TZIC_INTCNTL);
if (unlikely(imx_readl(tzic_base + TZIC_DSMINT) == 0))
imx_writel(imx_readl(tzic_base + TZIC_ENSET0(i)),
value = imx_readl(tzic_base + TZIC_INTSEC0(index)) | mask;
imx_writel(imx_readl(tzic_base + TZIC_ENSET0(idx)),