icc_set_bw
ret = icc_set_bw(qce->mem_path, QCE_DEFAULT_MEM_BANDWIDTH, QCE_DEFAULT_MEM_BANDWIDTH);
ret = icc_set_bw(__scm->path, 0, UINT_MAX);
icc_set_bw(__scm->path, 0, 0);
icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
icc_set_bw(kms->path[i], avg_bw, peak_bw);
icc_set_bw(dpu_kms->path[i], 0, 0);
icc_set_bw(path0, 0, MBps_to_icc(6400));
icc_set_bw(path1, 0, MBps_to_icc(6400));
icc_set_bw(path_rot, 0, MBps_to_icc(6400));
icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW));
icc_set_bw(msm_mdss->reg_bus_path, 0,
icc_set_bw(msm_mdss->mdp_path[i], 0, 0);
icc_set_bw(msm_mdss->reg_bus_path, 0, 0);
icc_set_bw(tegra->icc_mem, 0, 0);
icc_set_bw(tegra->icc_mem_vfilter, 0, 0);
icc_set_bw(tegra->icc_mem, new_avg_bw, new_peak_bw);
icc_set_bw(tegra->icc_mem_vfilter, new_avg_bw, new_peak_bw);
icc_set_bw(tegra->icc_mem_vfilter, 0, 0);
ret = icc_set_bw(qup->icc_path, 0, needed_peak_bw);
ret = icc_set_bw(paths[i].path, paths[i].avg_bw, paths[i].peak_bw);
EXPORT_SYMBOL_GPL(icc_set_bw);
return icc_set_bw(path, path->reqs[0].avg_bw,
ret = icc_set_bw(path, 0, 0);
ret = icc_set_bw(cur_path, avg_bw, peak_bw);
ret = icc_set_bw(path, 1000, 2000);
ret = icc_set_bw(path_cpu, 1000, 1000);
ret = icc_set_bw(path_gpu, 2000, 2000);
TRACE_EVENT(icc_set_bw,
ret = icc_set_bw(tbu->path, 0, UINT_MAX);
icc_set_bw(tbu->path, 0, 0);
ret = icc_set_bw(state->icc_path, 0, 0);
ret = icc_set_bw(state->icc_path, 0, state->icc_path_bw);
ret = icc_set_bw(camss->icc_path[i], 0, 0);
ret = icc_set_bw(camss->icc_path[i],
ret = icc_set_bw(core->cpucfg_path, 0, 0);
ret = icc_set_bw(core->video_path, 0, 0);
icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
ret = icc_set_bw(core->video_path, kbps_to_icc(20000), 0);
ret = icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
return icc_set_bw(core->video_path, total_avg, total_peak);
ret = icc_set_bw(opp_table->paths[i], avg, peak);
ret = icc_set_bw(pcie_ep->icc_mem, 0, width * QCOM_PCIE_LINK_SPEED_TO_BW(speed));
ret = icc_set_bw(pcie_ep->icc_mem, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));
icc_set_bw(pcie_ep->icc_mem, 0, 0);
ret = icc_set_bw(pcie->icc_mem, 0, QCOM_PCIE_LINK_SPEED_TO_BW(1));
ret = icc_set_bw(pcie->icc_cpu, 0, kBps_to_icc(1));
icc_set_bw(pcie->icc_mem, 0, 0);
ret = icc_set_bw(pcie->icc_mem, 0,
ret = icc_set_bw(pcie->icc_mem, 0, kBps_to_icc(1));
if (icc_set_bw(pcie->icc_path, Mbps_to_icc(val), 0))
icc_set_bw(q6v5->path, 0, 0);
ret = icc_set_bw(q6v5->path, 0, UINT_MAX);
icc_set_bw(q6v5->path, 0, 0);
icc_set_bw(q6v5->path, 0, 0);
ret = icc_set_bw(se->icc_paths[i].path,
ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, avg_bw_cpu, avg_bw_cpu);
ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, Bps_to_icc(1000),
ret = icc_set_bw(controller->icc_path, 0, needed_peak_bw);
ret = icc_set_bw(host->icc_ddr, 0, mem_bw);
ret = icc_set_bw(host->icc_cpu, 0, cfg_bw);
ret = icc_set_bw(qcom->icc_path_ddr,
ret = icc_set_bw(qcom->icc_path_ddr,
ret = icc_set_bw(qcom->icc_path_apps, APPS_USB_AVG_BW, APPS_USB_PEAK_BW);
ret = icc_set_bw(qcom->icc_path_ddr,
ret = icc_set_bw(qcom->icc_path_ddr,
ret = icc_set_bw(qcom->icc_path_apps, APPS_USB_AVG_BW, APPS_USB_PEAK_BW);
int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw);
return icc_set_bw(adma_isomgr->icc_path_handle,