guts
struct ccsr_guts __iomem *guts;
guts = of_iomap(np, 0);
if (!guts)
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
iounmap(guts);
static struct ccsr_guts __iomem *guts;
setbits32(&guts->devdisr, mask);
clrbits32(&guts->devdisr, mask);
in_be32(&guts->devdisr);
guts = of_iomap(np, 0);
if (!guts) {
struct ccsr_guts __iomem *guts;
guts = of_iomap(np, 0);
if (!guts) {
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = of_iomap(guts_node, 0);
if (!guts) {
if ((in_be32(&guts->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
clrsetbits_be32(&guts->pmuxcr, PMUXCR_ELBCDIU_MASK,
in_be32(&guts->pmuxcr);
if (guts)
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = of_iomap(guts_np, 0);
if (!guts) {
clrbits32(&guts->clkdvdr,
setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = of_iomap(guts_np, 0);
if (!guts) {
clrbits32(&guts->clkdvdr,
setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = of_iomap(np, 0);
if (!guts)
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
iounmap(guts);
struct device_node *guts;
guts = of_find_compatible_node(NULL, NULL,
if (guts) {
clockgen.guts = of_iomap(guts, 0);
if (!clockgen.guts) {
guts);
of_node_put(guts);
reg = ioread32be(&cg->guts->rcwsr[7]);
reg = ioread32be(&cg->guts->rcwsr[7]);
reg = ioread32be(&cg->guts->rcwsr[7]);
reg = ioread32be(&cg->guts->rcwsr[7]);
struct ccsr_guts __iomem *guts;
guts = devm_kzalloc(dev, sizeof(*guts), GFP_KERNEL);
if (!guts)
guts->little_endian = of_property_read_bool(np, "little-endian");
guts->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(guts->regs))
return PTR_ERR(guts->regs);
} *guts;
if (!guts || !guts->regs)
if (guts->little_endian)
svr = ioread32(&guts->regs->svr);
svr = ioread32be(&guts->regs->svr);
static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift);
static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift);
clrsetbits_be32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_SSI_DMA_TDM_MASK,
guts_set_dmuxcr(guts, mdata->dma_id[0], mdata->dma_channel_id[0],
guts_set_dmuxcr(guts, mdata->dma_id[1], mdata->dma_channel_id[1],
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
clrbits32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_UART0_I2C1_MASK);
clrbits32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_SSI_DMA_TDM_MASK);
guts_set_dmuxcr(guts, mdata->dma_id[0], mdata->dma_channel_id[0], 0);
guts_set_dmuxcr(guts, mdata->dma_id[1], mdata->dma_channel_id[1], 0);
iounmap(guts);
static inline void guts_set_dmuxcr(struct ccsr_guts __iomem *guts,
clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift);
struct ccsr_guts __iomem *guts;
guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
clrsetbits_be32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_UART0_I2C1_MASK,
clrsetbits_be32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_UART0_I2C1_MASK,
clrsetbits_be32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_SSI_DMA_TDM_MASK,
guts_set_dmuxcr(guts, mdata->dma_id[0], mdata->dma_channel_id[0],
guts_set_dmuxcr(guts, mdata->dma_id[1], mdata->dma_channel_id[1],
iounmap(guts);
struct ccsr_guts __iomem *guts;
guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
clrbits32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_UART0_I2C1_MASK);
clrbits32(&guts->pmuxcr, CCSR_GUTS_PMUXCR_SSI_DMA_TDM_MASK);
guts_set_dmuxcr(guts, mdata->dma_id[0], mdata->dma_channel_id[0], 0);
guts_set_dmuxcr(guts, mdata->dma_id[1], mdata->dma_channel_id[1], 0);
iounmap(guts);
static inline void guts_set_dmuxcr(struct ccsr_guts __iomem *guts,
clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift);
struct ccsr_guts __iomem *guts;
guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {