Symbol: evt2irq
arch/sh/boards/board-apsh4a3a.c
83
.start = evt2irq(0x200),
arch/sh/boards/board-apsh4a3a.c
84
.end = evt2irq(0x200),
arch/sh/boards/board-apsh4ad0a.c
35
.start = evt2irq(0x200),
arch/sh/boards/board-apsh4ad0a.c
36
.end = evt2irq(0x200),
arch/sh/boards/board-edosk7705.c
25
#define ETHERNET_IRQ evt2irq(0x320)
arch/sh/boards/board-edosk7760.c
111
.start = evt2irq(0x9c0),
arch/sh/boards/board-edosk7760.c
112
.end = evt2irq(0x9c0),
arch/sh/boards/board-edosk7760.c
139
.start = evt2irq(0x2a0),
arch/sh/boards/board-edosk7760.c
140
.end = evt2irq(0x2a0),
arch/sh/boards/board-edosk7760.c
88
.start = evt2irq(0x9e0),
arch/sh/boards/board-edosk7760.c
89
.end = evt2irq(0x9e0),
arch/sh/boards/board-espt.c
72
.start = evt2irq(0x920), /* irq number */
arch/sh/boards/board-magicpanelr2.c
255
.start = evt2irq(0x660),
arch/sh/boards/board-magicpanelr2.c
256
.end = evt2irq(0x660),
arch/sh/boards/board-magicpanelr2.c
370
irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
arch/sh/boards/board-magicpanelr2.c
371
irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
arch/sh/boards/board-magicpanelr2.c
372
irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
arch/sh/boards/board-magicpanelr2.c
373
irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
arch/sh/boards/board-magicpanelr2.c
374
irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
arch/sh/boards/board-magicpanelr2.c
375
irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
arch/sh/boards/board-magicpanelr2.c
377
intc_set_priority(evt2irq(0x600), 13); /* IRQ0 CAN1 */
arch/sh/boards/board-magicpanelr2.c
378
intc_set_priority(evt2irq(0x620), 13); /* IRQ0 CAN2 */
arch/sh/boards/board-magicpanelr2.c
379
intc_set_priority(evt2irq(0x640), 13); /* IRQ0 CAN3 */
arch/sh/boards/board-magicpanelr2.c
380
intc_set_priority(evt2irq(0x660), 6); /* IRQ3 SMSC9115 */
arch/sh/boards/board-secureedge5410.c
39
unsigned int irq = evt2irq(0x240);
arch/sh/boards/board-sh2007.c
40
.start = evt2irq(0x240),
arch/sh/boards/board-sh2007.c
41
.end = evt2irq(0x240),
arch/sh/boards/board-sh2007.c
53
.start = evt2irq(0x280),
arch/sh/boards/board-sh2007.c
54
.end = evt2irq(0x280),
arch/sh/boards/board-sh2007.c
91
.start = evt2irq(0x2c0),
arch/sh/boards/board-sh2007.c
92
.end = evt2irq(0x2c0),
arch/sh/boards/board-sh7757lcr.c
138
.start = evt2irq(0x2960),
arch/sh/boards/board-sh7757lcr.c
139
.end = evt2irq(0x2960),
arch/sh/boards/board-sh7757lcr.c
171
.start = evt2irq(0x2980),
arch/sh/boards/board-sh7757lcr.c
172
.end = evt2irq(0x2980),
arch/sh/boards/board-sh7757lcr.c
210
.start = evt2irq(0x1c60),
arch/sh/boards/board-sh7757lcr.c
214
.start = evt2irq(0x1c80),
arch/sh/boards/board-sh7757lcr.c
252
.start = evt2irq(0x480),
arch/sh/boards/board-sh7757lcr.c
288
.start = evt2irq(0x840),
arch/sh/boards/board-sh7757lcr.c
289
.end = evt2irq(0x840),
arch/sh/boards/board-sh7757lcr.c
68
.start = evt2irq(0xc80),
arch/sh/boards/board-sh7757lcr.c
69
.end = evt2irq(0xc80),
arch/sh/boards/board-sh7757lcr.c
95
.start = evt2irq(0xc80),
arch/sh/boards/board-sh7757lcr.c
96
.end = evt2irq(0xc80),
arch/sh/boards/board-sh7785lcr.c
107
.start = evt2irq(0x240),
arch/sh/boards/board-sh7785lcr.c
108
.end = evt2irq(0x240),
arch/sh/boards/board-sh7785lcr.c
137
.start = evt2irq(0x340),
arch/sh/boards/board-sh7785lcr.c
225
.start = evt2irq(0x380),
arch/sh/boards/board-sh7785lcr.c
226
.end = evt2irq(0x380),
arch/sh/boards/board-sh7785lcr.c
238
.start = evt2irq(0x380),
arch/sh/boards/board-sh7785lcr.c
239
.end = evt2irq(0x380),
arch/sh/boards/board-urquell.c
79
.start = evt2irq(0x360),
arch/sh/boards/mach-ap325rxa/setup.c
249
.start = evt2irq(0x580),
arch/sh/boards/mach-ap325rxa/setup.c
292
.start = evt2irq(0x880),
arch/sh/boards/mach-ap325rxa/setup.c
324
.start = evt2irq(0xe80),
arch/sh/boards/mach-ap325rxa/setup.c
351
.start = evt2irq(0x4e0),
arch/sh/boards/mach-ap325rxa/setup.c
66
.start = evt2irq(0x660),
arch/sh/boards/mach-ap325rxa/setup.c
67
.end = evt2irq(0x660),
arch/sh/boards/mach-ecovec24/setup.c
160
.start = evt2irq(0xd60),
arch/sh/boards/mach-ecovec24/setup.c
199
.start = evt2irq(0xa20),
arch/sh/boards/mach-ecovec24/setup.c
200
.end = evt2irq(0xa20),
arch/sh/boards/mach-ecovec24/setup.c
235
.start = evt2irq(0xa40),
arch/sh/boards/mach-ecovec24/setup.c
236
.end = evt2irq(0xa40),
arch/sh/boards/mach-ecovec24/setup.c
292
.start = evt2irq(0xa40),
arch/sh/boards/mach-ecovec24/setup.c
293
.end = evt2irq(0xa40),
arch/sh/boards/mach-ecovec24/setup.c
361
.start = evt2irq(0xf40),
arch/sh/boards/mach-ecovec24/setup.c
430
.start = evt2irq(0x880),
arch/sh/boards/mach-ecovec24/setup.c
467
.start = evt2irq(0x9e0),
arch/sh/boards/mach-ecovec24/setup.c
543
.irq = evt2irq(0x620),
arch/sh/boards/mach-ecovec24/setup.c
574
.start = evt2irq(0xbe0),
arch/sh/boards/mach-ecovec24/setup.c
590
#define IRQ0 evt2irq(0x600)
arch/sh/boards/mach-ecovec24/setup.c
731
.start = evt2irq(0xe80),
arch/sh/boards/mach-ecovec24/setup.c
772
.start = evt2irq(0x4e0),
arch/sh/boards/mach-ecovec24/setup.c
839
.start = evt2irq(0xc80),
arch/sh/boards/mach-ecovec24/setup.c
873
.start = evt2irq(0xf80),
arch/sh/boards/mach-ecovec24/setup.c
918
.start = evt2irq(0x480),
arch/sh/boards/mach-ecovec24/setup.c
955
.start = evt2irq(0x8e0),
arch/sh/boards/mach-ecovec24/setup.c
981
.start = evt2irq(0x5a0),
arch/sh/boards/mach-ecovec24/setup.c
986
.start = evt2irq(0x5c0),
arch/sh/boards/mach-hp6xx/setup.c
37
.start = evt2irq(0xba0),
arch/sh/boards/mach-kfr2r09/setup.c
127
.start = evt2irq(0xbe0),
arch/sh/boards/mach-kfr2r09/setup.c
190
.start = evt2irq(0xf40),
arch/sh/boards/mach-kfr2r09/setup.c
226
.start = evt2irq(0xa20),
arch/sh/boards/mach-kfr2r09/setup.c
227
.end = evt2irq(0xa20),
arch/sh/boards/mach-kfr2r09/setup.c
265
.start = evt2irq(0x880),
arch/sh/boards/mach-kfr2r09/setup.c
266
.end = evt2irq(0x880),
arch/sh/boards/mach-kfr2r09/setup.c
316
.start = evt2irq(0xe80),
arch/sh/boards/mach-migor/setup.c
291
.start = evt2irq(0x580),
arch/sh/boards/mach-migor/setup.c
333
.start = evt2irq(0x880),
arch/sh/boards/mach-migor/setup.c
381
.start = evt2irq(0xe80),
arch/sh/boards/mach-migor/setup.c
416
.irq = evt2irq(0x6c0), /* IRQ6 */
arch/sh/boards/mach-migor/setup.c
63
.start = evt2irq(0x600), /* IRQ0 */
arch/sh/boards/mach-migor/setup.c
97
.start = evt2irq(0xbe0),
arch/sh/boards/mach-sdk7786/setup.c
55
.start = evt2irq(0x2c0),
arch/sh/boards/mach-sdk7786/setup.c
56
.end = evt2irq(0x2c0),
arch/sh/boards/mach-se/7722/setup.c
116
.start = evt2irq(0xbe0),
arch/sh/boards/mach-se/7724/setup.c
211
.start = evt2irq(0xf40),
arch/sh/boards/mach-se/7724/setup.c
238
.start = evt2irq(0x880),
arch/sh/boards/mach-se/7724/setup.c
266
.start = evt2irq(0x9e0),
arch/sh/boards/mach-se/7724/setup.c
291
.start = evt2irq(0xf80),
arch/sh/boards/mach-se/7724/setup.c
348
.start = evt2irq(0xbe0),
arch/sh/boards/mach-se/7724/setup.c
371
.start = evt2irq(0xd60),
arch/sh/boards/mach-se/7724/setup.c
402
.start = evt2irq(0xa20),
arch/sh/boards/mach-se/7724/setup.c
403
.end = evt2irq(0xa20),
arch/sh/boards/mach-se/7724/setup.c
431
.start = evt2irq(0xa40),
arch/sh/boards/mach-se/7724/setup.c
432
.end = evt2irq(0xa40),
arch/sh/boards/mach-se/7724/setup.c
466
.start = evt2irq(0xe80),
arch/sh/boards/mach-se/7724/setup.c
495
.start = evt2irq(0x4e0),
arch/sh/boards/mach-se/7724/setup.c
525
.start = evt2irq(0x480),
arch/sh/boards/mach-se/7724/setup.c
563
.start = evt2irq(0x8e0),
arch/sh/boards/mach-sh7763rdp/setup.c
80
.start = evt2irq(0x920), /* irq number */
arch/sh/drivers/pci/fixups-landisk.c
29
int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
arch/sh/drivers/pci/fixups-r7780rp.c
17
return evt2irq(0xa20) + slot;
arch/sh/drivers/pci/fixups-sdk7780.c
16
#define IRQ_INTA evt2irq(0xa20)
arch/sh/drivers/pci/fixups-sdk7780.c
17
#define IRQ_INTB evt2irq(0xa40)
arch/sh/drivers/pci/fixups-sdk7780.c
18
#define IRQ_INTC evt2irq(0xa60)
arch/sh/drivers/pci/fixups-sdk7780.c
19
#define IRQ_INTD evt2irq(0xa80)
arch/sh/drivers/pci/fixups-se7751.c
14
case 0: return evt2irq(0x3a0);
arch/sh/drivers/pci/fixups-se7751.c
15
case 1: return evt2irq(0x3a0); /* AMD Ethernet controller */
arch/sh/drivers/pci/fixups-sh03.c
14
case 4: return evt2irq(0x2a0); /* eth0 */
arch/sh/drivers/pci/fixups-sh03.c
15
case 8: return evt2irq(0x2a0); /* eth1 */
arch/sh/drivers/pci/fixups-sh03.c
16
case 6: return evt2irq(0x240); /* PCI bridge */
arch/sh/drivers/pci/fixups-sh03.c
20
return evt2irq(0x240);
arch/sh/drivers/pci/fixups-sh03.c
24
case 0: irq = evt2irq(0x240); break;
arch/sh/drivers/pci/fixups-sh03.c
25
case 1: irq = evt2irq(0x240); break;
arch/sh/drivers/pci/fixups-sh03.c
26
case 2: irq = evt2irq(0x240); break;
arch/sh/drivers/pci/fixups-sh03.c
27
case 3: irq = evt2irq(0x240); break;
arch/sh/drivers/pci/fixups-sh03.c
28
case 4: irq = evt2irq(0x240); break;
arch/sh/drivers/pci/fixups-snapgear.c
26
case 11: irq = evt2irq(0x300); break; /* USB */
arch/sh/drivers/pci/fixups-snapgear.c
27
case 12: irq = evt2irq(0x360); break; /* PCMCIA */
arch/sh/drivers/pci/fixups-snapgear.c
28
case 13: irq = evt2irq(0x2a0); break; /* eth0 */
arch/sh/drivers/pci/fixups-snapgear.c
29
case 14: irq = evt2irq(0x300); break; /* eth1 */
arch/sh/drivers/pci/fixups-snapgear.c
30
case 15: irq = evt2irq(0x360); break; /* safenet (unused) */
arch/sh/drivers/pci/pci-sh7780.c
62
.serr_irq = evt2irq(0xa00),
arch/sh/drivers/pci/pci-sh7780.c
63
.err_irq = evt2irq(0xaa0),
arch/sh/drivers/pci/pcie-sh7786.c
484
return evt2irq(0xae0);
arch/sh/include/cpu-sh3/cpu/dma.h
16
#define DMTE0_IRQ evt2irq(0x800)
arch/sh/include/cpu-sh3/cpu/dma.h
17
#define DMTE4_IRQ evt2irq(0xb80)
arch/sh/include/cpu-sh4/cpu/dma.h
10
#define DMTE0_IRQ evt2irq(0x640)
arch/sh/include/cpu-sh4/cpu/dma.h
11
#define DMTE4_IRQ evt2irq(0x780)
arch/sh/include/cpu-sh4/cpu/dma.h
12
#define DMTE6_IRQ evt2irq(0x7c0)
arch/sh/include/cpu-sh4/cpu/dma.h
13
#define DMAE0_IRQ evt2irq(0x6c0)
arch/sh/include/cpu-sh4a/cpu/dma.h
10
#define DMTE4_IRQ evt2irq(0xb80)
arch/sh/include/cpu-sh4a/cpu/dma.h
11
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
14
#define DMTE0_IRQ evt2irq(0x800)
arch/sh/include/cpu-sh4a/cpu/dma.h
15
#define DMTE4_IRQ evt2irq(0xb80)
arch/sh/include/cpu-sh4a/cpu/dma.h
16
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
19
#define DMTE0_IRQ evt2irq(0x640)
arch/sh/include/cpu-sh4a/cpu/dma.h
20
#define DMTE4_IRQ evt2irq(0x780)
arch/sh/include/cpu-sh4a/cpu/dma.h
21
#define DMAE0_IRQ evt2irq(0x6c0)
arch/sh/include/cpu-sh4a/cpu/dma.h
24
#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/
arch/sh/include/cpu-sh4a/cpu/dma.h
25
#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */
arch/sh/include/cpu-sh4a/cpu/dma.h
26
#define DMTE6_IRQ evt2irq(0x700)
arch/sh/include/cpu-sh4a/cpu/dma.h
27
#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */
arch/sh/include/cpu-sh4a/cpu/dma.h
28
#define DMTE9_IRQ evt2irq(0x760)
arch/sh/include/cpu-sh4a/cpu/dma.h
29
#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */
arch/sh/include/cpu-sh4a/cpu/dma.h
30
#define DMTE11_IRQ evt2irq(0xb20)
arch/sh/include/cpu-sh4a/cpu/dma.h
31
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
32
#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
36
#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/
arch/sh/include/cpu-sh4a/cpu/dma.h
37
#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */
arch/sh/include/cpu-sh4a/cpu/dma.h
38
#define DMTE6_IRQ evt2irq(0x700)
arch/sh/include/cpu-sh4a/cpu/dma.h
39
#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */
arch/sh/include/cpu-sh4a/cpu/dma.h
40
#define DMTE9_IRQ evt2irq(0x760)
arch/sh/include/cpu-sh4a/cpu/dma.h
41
#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */
arch/sh/include/cpu-sh4a/cpu/dma.h
42
#define DMTE11_IRQ evt2irq(0xb20)
arch/sh/include/cpu-sh4a/cpu/dma.h
43
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
44
#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/
arch/sh/include/cpu-sh4a/cpu/dma.h
48
#define DMTE0_IRQ evt2irq(0x640)
arch/sh/include/cpu-sh4a/cpu/dma.h
49
#define DMTE4_IRQ evt2irq(0x780)
arch/sh/include/cpu-sh4a/cpu/dma.h
50
#define DMTE6_IRQ evt2irq(0x7c0)
arch/sh/include/cpu-sh4a/cpu/dma.h
51
#define DMTE8_IRQ evt2irq(0xd80)
arch/sh/include/cpu-sh4a/cpu/dma.h
52
#define DMTE9_IRQ evt2irq(0xda0)
arch/sh/include/cpu-sh4a/cpu/dma.h
53
#define DMTE10_IRQ evt2irq(0xdc0)
arch/sh/include/cpu-sh4a/cpu/dma.h
54
#define DMTE11_IRQ evt2irq(0xde0)
arch/sh/include/cpu-sh4a/cpu/dma.h
55
#define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */
arch/sh/include/cpu-sh4a/cpu/dma.h
59
#define DMTE0_IRQ evt2irq(0x620)
arch/sh/include/cpu-sh4a/cpu/dma.h
60
#define DMTE4_IRQ evt2irq(0x6a0)
arch/sh/include/cpu-sh4a/cpu/dma.h
61
#define DMTE6_IRQ evt2irq(0x880)
arch/sh/include/cpu-sh4a/cpu/dma.h
62
#define DMTE8_IRQ evt2irq(0x8c0)
arch/sh/include/cpu-sh4a/cpu/dma.h
63
#define DMTE9_IRQ evt2irq(0x8e0)
arch/sh/include/cpu-sh4a/cpu/dma.h
64
#define DMTE10_IRQ evt2irq(0x900)
arch/sh/include/cpu-sh4a/cpu/dma.h
65
#define DMTE11_IRQ evt2irq(0x920)
arch/sh/include/cpu-sh4a/cpu/dma.h
66
#define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */
arch/sh/include/cpu-sh4a/cpu/dma.h
67
#define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */
arch/sh/include/cpu-sh4a/cpu/dma.h
9
#define DMTE0_IRQ evt2irq(0x800)
arch/sh/include/mach-common/mach/hp6xx.h
10
#define HP680_BTN_IRQ evt2irq(0x600) /* IRQ0_IRQ */
arch/sh/include/mach-common/mach/hp6xx.h
11
#define HP680_TS_IRQ evt2irq(0x660) /* IRQ3_IRQ */
arch/sh/include/mach-common/mach/hp6xx.h
12
#define HP680_HD64461_IRQ evt2irq(0x680) /* IRQ4_IRQ */
arch/sh/include/mach-common/mach/lboxre2.h
12
#define IRQ_CF1 evt2irq(0x320) /* CF1 */
arch/sh/include/mach-common/mach/lboxre2.h
13
#define IRQ_CF0 evt2irq(0x340) /* CF0 */
arch/sh/include/mach-common/mach/lboxre2.h
14
#define IRQ_INTD evt2irq(0x360) /* INTD */
arch/sh/include/mach-common/mach/lboxre2.h
15
#define IRQ_ETH1 evt2irq(0x380) /* Ether1 */
arch/sh/include/mach-common/mach/lboxre2.h
16
#define IRQ_ETH0 evt2irq(0x3a0) /* Ether0 */
arch/sh/include/mach-common/mach/lboxre2.h
17
#define IRQ_INTA evt2irq(0x3c0) /* INTA */
arch/sh/include/mach-common/mach/sdk7780.h
68
#define IRQ_CFCARD evt2irq(0x3c0)
arch/sh/include/mach-common/mach/sdk7780.h
70
#define IRQ_ETHERNET evt2irq(0x2c0)
arch/sh/include/mach-common/mach/titan.h
14
#define TITAN_IRQ_WAN evt2irq(0x240) /* eth0 (WAN) */
arch/sh/include/mach-common/mach/titan.h
15
#define TITAN_IRQ_LAN evt2irq(0x2a0) /* eth1 (LAN) */
arch/sh/include/mach-common/mach/titan.h
16
#define TITAN_IRQ_MPCIA evt2irq(0x300) /* mPCI A */
arch/sh/include/mach-common/mach/titan.h
17
#define TITAN_IRQ_MPCIB evt2irq(0x360) /* mPCI B */
arch/sh/include/mach-common/mach/titan.h
18
#define TITAN_IRQ_USB evt2irq(0x360) /* USB */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
30
#define IRQ_PCIINTA evt2irq(0x2a0) /* PCI INTA IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
31
#define IRQ_PCIINTB evt2irq(0x2c0) /* PCI INTB IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
32
#define IRQ_PCIINTC evt2irq(0x2e0) /* PCI INTC IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
33
#define IRQ_PCIINTD evt2irq(0x300) /* PCI INTD IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
34
#define IRQ_ATA evt2irq(0x320) /* ATA IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
35
#define IRQ_FATA evt2irq(0x340) /* FATA IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
36
#define IRQ_POWER evt2irq(0x360) /* Power Switch IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
37
#define IRQ_BUTTON evt2irq(0x380) /* USL-5P Button IRQ */
arch/sh/include/mach-landisk/mach/iodata_landisk.h
38
#define IRQ_FAULT evt2irq(0x3a0) /* USL-5P Fault IRQ */
arch/sh/include/mach-se/mach/se.h
111
#define SH_ETH0_IRQ evt2irq(0xc00)
arch/sh/include/mach-se/mach/se.h
112
#define SH_ETH1_IRQ evt2irq(0xc20)
arch/sh/include/mach-se/mach/se.h
113
#define SH_TSU_IRQ evt2irq(0xc40)
arch/sh/include/mach-se/mach/se.h
87
#define IRQ0_IRQ evt2irq(0x600)
arch/sh/include/mach-se/mach/se.h
88
#define IRQ1_IRQ evt2irq(0x620)
arch/sh/include/mach-se/mach/se.h
92
#define IRQ_STNIC evt2irq(0x380)
arch/sh/include/mach-se/mach/se.h
93
#define IRQ_CFCARD evt2irq(0x3c0)
arch/sh/include/mach-se/mach/se.h
95
#define IRQ_STNIC evt2irq(0x340)
arch/sh/include/mach-se/mach/se.h
96
#define IRQ_CFCARD evt2irq(0x2e0)
arch/sh/include/mach-se/mach/se7343.h
120
#define IRQ0_IRQ evt2irq(0x600)
arch/sh/include/mach-se/mach/se7343.h
121
#define IRQ1_IRQ evt2irq(0x620)
arch/sh/include/mach-se/mach/se7343.h
122
#define IRQ4_IRQ evt2irq(0x680)
arch/sh/include/mach-se/mach/se7343.h
123
#define IRQ5_IRQ evt2irq(0x6a0)
arch/sh/include/mach-se/mach/se7721.h
52
#define MRSHPC_IRQ0 evt2irq(0x340)
arch/sh/include/mach-se/mach/se7722.h
77
#define IRQ0_IRQ evt2irq(0x600)
arch/sh/include/mach-se/mach/se7722.h
78
#define IRQ1_IRQ evt2irq(0x620)
arch/sh/include/mach-se/mach/se7724.h
35
#define IRQ0_IRQ evt2irq(0x600)
arch/sh/include/mach-se/mach/se7724.h
36
#define IRQ1_IRQ evt2irq(0x620)
arch/sh/include/mach-se/mach/se7724.h
37
#define IRQ2_IRQ evt2irq(0x640)
arch/sh/include/mach-se/mach/se7751.h
68
#define IRQ_79C973 evt2irq(0x3a0)
arch/sh/include/mach-se/mach/se7780.h
81
#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */
arch/sh/include/mach-se/mach/se7780.h
84
#define SMC_IRQ evt2irq(0x300)
arch/sh/include/mach-se/mach/se7780.h
87
#define SM501_IRQ evt2irq(0x200)
arch/sh/kernel/cpu/sh3/setup-sh7705.c
100
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh3/setup-sh7705.c
120
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh3/setup-sh7705.c
145
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh3/setup-sh7705.c
146
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh3/setup-sh7705.c
147
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh3/setup-sh7705.c
79
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
116
DEFINE_RES_IRQ(evt2irq(0x4e0)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
139
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
161
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
181
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
182
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
183
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh3/setup-sh770x.c
97
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
105
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
125
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
144
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
145
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
146
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh3/setup-sh7710.c
79
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
101
.start = evt2irq(0xa60),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
102
.end = evt2irq(0xa60),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
132
.start = evt2irq(0xa20),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
133
.end = evt2irq(0xa20),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
155
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
174
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
175
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
176
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
33
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
60
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh3/setup-sh7720.c
81
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
109
DEFINE_RES_IRQ(evt2irq(0xb00)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
110
DEFINE_RES_IRQ(evt2irq(0xb80)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
26
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
44
DEFINE_RES_IRQ(evt2irq(0x4e0)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
64
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
83
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
84
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4/setup-sh7750.c
85
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
136
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
137
DEFINE_RES_IRQ(evt2irq(0x8a0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
138
DEFINE_RES_IRQ(evt2irq(0x8e0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
139
DEFINE_RES_IRQ(evt2irq(0x8c0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
160
DEFINE_RES_IRQ(evt2irq(0xb00)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
161
DEFINE_RES_IRQ(evt2irq(0xb20)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
162
DEFINE_RES_IRQ(evt2irq(0xb60)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
163
DEFINE_RES_IRQ(evt2irq(0xb40)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
184
DEFINE_RES_IRQ(evt2irq(0xb80)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
185
DEFINE_RES_IRQ(evt2irq(0xba0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
186
DEFINE_RES_IRQ(evt2irq(0xbe0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
187
DEFINE_RES_IRQ(evt2irq(0xbc0)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
213
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
214
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
215
DEFINE_RES_IRQ(evt2irq(0xc40)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
234
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
235
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4/setup-sh7760.c
236
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
106
.start = evt2irq(0xe00),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
107
.end = evt2irq(0xe60),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
127
.start = evt2irq(0x780),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
128
.end = evt2irq(0x7e0),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
143
.irq = evt2irq(0x980),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
171
.irq = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
199
.irq = evt2irq(0x560),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
230
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
249
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
25
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
250
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
251
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
45
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
65
DEFINE_RES_IRQ(evt2irq(0xc40)),
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
85
DEFINE_RES_IRQ(evt2irq(0xc60)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
121
.irq = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
149
.irq = evt2irq(0x560),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
180
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
199
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
200
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
201
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
27
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
48
.start = evt2irq(0xe00),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
49
.end = evt2irq(0xe60),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
72
.start = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
73
.end = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
93
.irq = evt2irq(0x980),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
150
.start = evt2irq(0xbc0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
151
.end = evt2irq(0xbc0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
156
.start = evt2irq(0x800),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
157
.end = evt2irq(0x860),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
162
.start = evt2irq(0xb80),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
163
.end = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
188
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
210
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
232
DEFINE_RES_IRQ(evt2irq(0xc40)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
253
.start = evt2irq(0x7a0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
258
.start = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
263
.start = evt2irq(0x780),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
287
.start = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
288
.end = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
313
.start = evt2irq(0xe00),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
314
.end = evt2irq(0xe60),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
329
.irq = evt2irq(0x980),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
357
.irq = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
385
.irq = evt2irq(0x560),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
416
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
435
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
436
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
437
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
464
.start = evt2irq(0xf80),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
116
DEFINE_RES_IRQ(evt2irq(0xd00)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
136
DEFINE_RES_IRQ(evt2irq(0xfa0)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
152
.irq = evt2irq(0x980),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
180
.irq = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
208
.irq = evt2irq(0x560),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
239
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
258
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
259
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
260
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
279
DEFINE_RES_IRQ(evt2irq(0x920)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
280
DEFINE_RES_IRQ(evt2irq(0x940)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
281
DEFINE_RES_IRQ(evt2irq(0x960)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
302
.start = evt2irq(0xaa0),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
307
.start = evt2irq(0xac0),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
312
.start = evt2irq(0xa80),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
335
.start = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
336
.end = evt2irq(0xa20),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
34
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
361
.start = evt2irq(0xe00),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
362
.end = evt2irq(0xe60),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
55
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
76
DEFINE_RES_IRQ(evt2irq(0xc40)),
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
96
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
218
.start = evt2irq(0xbc0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
219
.end = evt2irq(0xbc0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
224
.start = evt2irq(0x800),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
225
.end = evt2irq(0x860),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
230
.start = evt2irq(0xb80),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
231
.end = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
252
.start = evt2irq(0xb40),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
253
.end = evt2irq(0xb40),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
258
.start = evt2irq(0x700),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
259
.end = evt2irq(0x760),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
264
.start = evt2irq(0xb00),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
265
.end = evt2irq(0xb20),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
299
DEFINE_RES_IRQ(evt2irq(0xc00)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
320
DEFINE_RES_IRQ(evt2irq(0xc20)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
341
DEFINE_RES_IRQ(evt2irq(0xc40)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
361
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
381
DEFINE_RES_IRQ(evt2irq(0xd00)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
401
DEFINE_RES_IRQ(evt2irq(0xfa0)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
423
.start = evt2irq(0xaa0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
428
.start = evt2irq(0xac0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
433
.start = evt2irq(0xa80),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
454
.start = evt2irq(0xe00),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
455
.end = evt2irq(0xe60),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
476
.start = evt2irq(0xd80),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
477
.end = evt2irq(0xde0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
493
.irq = evt2irq(0x980),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
522
.irq = evt2irq(0xc60),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
551
.irq = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
580
.irq = evt2irq(0x8A0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
609
.irq = evt2irq(0xA00),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
640
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
659
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
660
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
661
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
680
DEFINE_RES_IRQ(evt2irq(0x920)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
681
DEFINE_RES_IRQ(evt2irq(0x940)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
682
DEFINE_RES_IRQ(evt2irq(0x960)),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
699
.irq = evt2irq(0x560),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
728
.irq = evt2irq(0xcc0),
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
757
.irq = evt2irq(0xce0),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
117
DEFINE_RES_IRQ(evt2irq(0x940)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
138
DEFINE_RES_IRQ(evt2irq(0x960)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
160
.start = evt2irq(0xC00),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
181
.start = evt2irq(0x860),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
200
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
201
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
202
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
221
DEFINE_RES_IRQ(evt2irq(0x480)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
222
DEFINE_RES_IRQ(evt2irq(0x4a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
223
DEFINE_RES_IRQ(evt2irq(0x4c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
242
DEFINE_RES_IRQ(evt2irq(0x500)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
243
DEFINE_RES_IRQ(evt2irq(0x520)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
244
DEFINE_RES_IRQ(evt2irq(0x540)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
33
DEFINE_RES_IRQ(evt2irq(0x8c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
54
DEFINE_RES_IRQ(evt2irq(0x8e0)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
75
DEFINE_RES_IRQ(evt2irq(0x900)),
arch/sh/kernel/cpu/sh4a/setup-sh7734.c
96
DEFINE_RES_IRQ(evt2irq(0x920)),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
114
.start = evt2irq(0xcc0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
34
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
458
.start = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
459
.end = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
480
.start = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
481
.end = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
486
.start = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
487
.end = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
492
.start = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
493
.end = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
498
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
499
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
504
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
505
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
510
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
511
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
516
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
517
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
522
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
523
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
528
.start = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
529
.end = evt2irq(0xd00),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
54
DEFINE_RES_IRQ(evt2irq(0xb80)),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
550
.start = evt2irq(0x2a60),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
551
.end = evt2irq(0x2a60),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
556
.start = evt2irq(0x2400),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
557
.end = evt2irq(0x2480),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
562
.start = evt2irq(0x24e0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
563
.end = evt2irq(0x24e0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
584
.start = evt2irq(0x2a80),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
585
.end = evt2irq(0x2a80),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
590
.start = evt2irq(0x2500),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
591
.end = evt2irq(0x2580),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
596
.start = evt2irq(0x2600),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
597
.end = evt2irq(0x2600),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
660
.start = evt2irq(0x8c0),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
679
.start = evt2irq(0x1d80),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
698
.start = evt2irq(0x920),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
699
.end = evt2irq(0x920),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
722
.start = evt2irq(0x920),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
723
.end = evt2irq(0x920),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
74
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
93
DEFINE_RES_IRQ(evt2irq(0x580)),
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
94
DEFINE_RES_IRQ(evt2irq(0x5a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
109
.start = evt2irq(0xc60),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
110
.end = evt2irq(0xc60),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
138
.start = evt2irq(0xc80),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
139
.end = evt2irq(0xc80),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
161
DEFINE_RES_IRQ(evt2irq(0x580)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
162
DEFINE_RES_IRQ(evt2irq(0x5a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
163
DEFINE_RES_IRQ(evt2irq(0x5c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
182
DEFINE_RES_IRQ(evt2irq(0xe00)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
183
DEFINE_RES_IRQ(evt2irq(0xe20)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
184
DEFINE_RES_IRQ(evt2irq(0xe40)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
27
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
48
DEFINE_RES_IRQ(evt2irq(0xb80)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
69
DEFINE_RES_IRQ(evt2irq(0xf00)),
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
90
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
103
DEFINE_RES_IRQ(evt2irq(0xa20)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
123
DEFINE_RES_IRQ(evt2irq(0xa40)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
143
DEFINE_RES_IRQ(evt2irq(0xa60)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
163
DEFINE_RES_IRQ(evt2irq(0xa80)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
183
DEFINE_RES_IRQ(evt2irq(0xaa0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
203
DEFINE_RES_IRQ(evt2irq(0xac0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
222
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
223
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
224
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
23
DEFINE_RES_IRQ(evt2irq(0x9a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
243
DEFINE_RES_IRQ(evt2irq(0x460)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
244
DEFINE_RES_IRQ(evt2irq(0x480)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
245
DEFINE_RES_IRQ(evt2irq(0x4a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
264
DEFINE_RES_IRQ(evt2irq(0x4c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
265
DEFINE_RES_IRQ(evt2irq(0x4e0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
266
DEFINE_RES_IRQ(evt2irq(0x500)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
43
DEFINE_RES_IRQ(evt2irq(0x9c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
63
DEFINE_RES_IRQ(evt2irq(0x9e0)),
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
83
DEFINE_RES_IRQ(evt2irq(0xa00)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
110
.start = evt2irq(0x480),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
212
.start = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
213
.end = evt2irq(0x640),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
232
.start = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
233
.end = evt2irq(0x7c0),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
26
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
47
DEFINE_RES_IRQ(evt2irq(0xb80)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
66
DEFINE_RES_IRQ(evt2irq(0x580)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
67
DEFINE_RES_IRQ(evt2irq(0x5a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
68
DEFINE_RES_IRQ(evt2irq(0x5c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
87
DEFINE_RES_IRQ(evt2irq(0xe00)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
88
DEFINE_RES_IRQ(evt2irq(0xe20)),
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
89
DEFINE_RES_IRQ(evt2irq(0xe40)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
112
DEFINE_RES_IRQ(evt2irq(0x9c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
133
DEFINE_RES_IRQ(evt2irq(0x9e0)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
152
DEFINE_RES_IRQ(evt2irq(0x580)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
153
DEFINE_RES_IRQ(evt2irq(0x5a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
154
DEFINE_RES_IRQ(evt2irq(0x5c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
173
DEFINE_RES_IRQ(evt2irq(0xe00)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
174
DEFINE_RES_IRQ(evt2irq(0xe20)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
175
DEFINE_RES_IRQ(evt2irq(0xe40)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
278
.start = evt2irq(0x620),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
279
.end = evt2irq(0x620),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
28
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
298
.start = evt2irq(0x880),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
299
.end = evt2irq(0x880),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
49
DEFINE_RES_IRQ(evt2irq(0x780)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
70
DEFINE_RES_IRQ(evt2irq(0x980)),
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
91
DEFINE_RES_IRQ(evt2irq(0x9a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
114
DEFINE_RES_IRQ(evt2irq(0x860)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
135
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
156
DEFINE_RES_IRQ(evt2irq(0x8a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
175
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
176
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
177
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
196
DEFINE_RES_IRQ(evt2irq(0x480)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
197
DEFINE_RES_IRQ(evt2irq(0x4a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
198
DEFINE_RES_IRQ(evt2irq(0x4c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
217
DEFINE_RES_IRQ(evt2irq(0x7a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
218
DEFINE_RES_IRQ(evt2irq(0x7a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
219
DEFINE_RES_IRQ(evt2irq(0x7a0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
238
DEFINE_RES_IRQ(evt2irq(0x7c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
239
DEFINE_RES_IRQ(evt2irq(0x7c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
240
DEFINE_RES_IRQ(evt2irq(0x7c0)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
309
.start = evt2irq(0x5c0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
310
.end = evt2irq(0x5c0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
314
.start = evt2irq(0x500),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
315
.end = evt2irq(0x5a0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
340
.start = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
341
.end = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
36
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
364
.start = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
365
.end = evt2irq(0xba0),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
37
DEFINE_RES_IRQ(evt2irq(0x720)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
38
DEFINE_RES_IRQ(evt2irq(0x760)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
39
DEFINE_RES_IRQ(evt2irq(0x740)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
63
DEFINE_RES_IRQ(evt2irq(0x780)),
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
93
DEFINE_RES_IRQ(evt2irq(0x840)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
103
DEFINE_RES_IRQ(evt2irq(0x400)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
104
DEFINE_RES_IRQ(evt2irq(0x420)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
105
DEFINE_RES_IRQ(evt2irq(0x440)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
124
DEFINE_RES_IRQ(evt2irq(0x460)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
125
DEFINE_RES_IRQ(evt2irq(0x480)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
126
DEFINE_RES_IRQ(evt2irq(0x4a0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
35
DEFINE_RES_IRQ(evt2irq(0x700)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
36
DEFINE_RES_IRQ(evt2irq(0x720)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
37
DEFINE_RES_IRQ(evt2irq(0x760)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
38
DEFINE_RES_IRQ(evt2irq(0x740)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
58
DEFINE_RES_IRQ(evt2irq(0x780)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
59
DEFINE_RES_IRQ(evt2irq(0x7a0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
60
DEFINE_RES_IRQ(evt2irq(0x7e0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
61
DEFINE_RES_IRQ(evt2irq(0x7c0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
81
DEFINE_RES_IRQ(evt2irq(0x880)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
82
DEFINE_RES_IRQ(evt2irq(0x8a0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
83
DEFINE_RES_IRQ(evt2irq(0x8e0)),
arch/sh/kernel/cpu/sh4a/setup-shx3.c
84
DEFINE_RES_IRQ(evt2irq(0x8c0)),
drivers/sh/intc/core.c
324
unsigned int irq = evt2irq(vect->vect);
drivers/sh/intc/core.c
337
unsigned int irq2 = evt2irq(vect2->vect);
drivers/sh/intc/irqdomain.c
34
*out_hwirq = evt2irq(intspec[0]);
drivers/sh/intc/irqdomain.c
52
irq_base = evt2irq(hw->vectors[0].vect);
drivers/sh/intc/irqdomain.c
53
irq_end = evt2irq(hw->vectors[hw->nr_vectors - 1].vect);