event_reg
int event_reg;
event_reg = SH_ER;
event_reg = SH_ESR;
while (edma_shadow0_read_array(echan->ecc, event_reg, idx) & ch_bit) {
unsigned int event_reg, val;
event_reg = IQS620_GLBL_EVENT_MASK;
event_reg = IQS624_HALL_UI;
return regmap_update_bits(iqs62x->regmap, event_reg, event_mask, 0);
enum iqs62x_event_reg event_reg;
event_reg = iqs62x->dev_desc->event_regs[iqs62x->ui_sel][i];
switch (event_reg) {
if (event_desc.reg != event_reg)
if (event_reg(data_fd, "test u32 count", &write, &enabled) == -1)