Symbol: enc_param
drivers/media/platform/amphion/vpu_windsor.c
615
ctrl->enc_param = base_phy_addr + offset;
drivers/media/platform/amphion/vpu_windsor.c
94
u32 enc_param;
drivers/media/platform/chips-media/wave5/wave5-hw.c
2158
int wave5_vpu_encode(struct vpu_instance *inst, struct enc_param *option, u32 *fail_res)
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1001
inst->enc_param.level = 32;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1004
inst->enc_param.level = 40;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1007
inst->enc_param.level = 41;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1010
inst->enc_param.level = 42;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1013
inst->enc_param.level = 50;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1016
inst->enc_param.level = 51;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1023
inst->enc_param.min_qp_i = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1024
inst->enc_param.min_qp_p = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1025
inst->enc_param.min_qp_b = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1028
inst->enc_param.max_qp_i = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1029
inst->enc_param.max_qp_p = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1030
inst->enc_param.max_qp_b = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1033
inst->enc_param.intra_qp = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1038
inst->enc_param.disable_deblk = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1039
inst->enc_param.lf_cross_slice_boundary_enable = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1042
inst->enc_param.disable_deblk = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1043
inst->enc_param.lf_cross_slice_boundary_enable = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1046
inst->enc_param.disable_deblk = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1047
inst->enc_param.lf_cross_slice_boundary_enable = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1054
inst->enc_param.beta_offset_div2 = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1057
inst->enc_param.tc_offset_div2 = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1060
inst->enc_param.transform8x8_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1063
inst->enc_param.const_intra_pred_flag = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1066
inst->enc_param.chroma_cb_qp_offset = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1067
inst->enc_param.chroma_cr_qp_offset = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1070
inst->enc_param.intra_period = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1073
inst->enc_param.entropy_coding_mode = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1076
inst->enc_param.forced_idr_header_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
1145
struct enc_wave_param input = inst->enc_param;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
135
struct enc_param pic_param;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
141
memset(&pic_param, 0, sizeof(struct enc_param));
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
784
inst->enc_param.avc_idr_period = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
787
inst->enc_param.independ_slice_mode = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
788
inst->enc_param.avc_slice_mode = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
791
inst->enc_param.independ_slice_mode_arg = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
792
inst->enc_param.avc_slice_arg = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
798
inst->enc_param.mb_level_rc_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
799
inst->enc_param.cu_level_rc_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
800
inst->enc_param.hvs_qp_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
805
inst->enc_param.profile = HEVC_PROFILE_MAIN;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
809
inst->enc_param.profile = HEVC_PROFILE_STILLPICTURE;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
810
inst->enc_param.en_still_picture = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
814
inst->enc_param.profile = HEVC_PROFILE_MAIN10;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
824
inst->enc_param.level = 10 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
827
inst->enc_param.level = 20 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
830
inst->enc_param.level = 21 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
833
inst->enc_param.level = 30 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
836
inst->enc_param.level = 31 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
839
inst->enc_param.level = 40 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
842
inst->enc_param.level = 41 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
845
inst->enc_param.level = 50 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
848
inst->enc_param.level = 51 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
851
inst->enc_param.level = 52 * 3;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
858
inst->enc_param.min_qp_i = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
859
inst->enc_param.min_qp_p = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
860
inst->enc_param.min_qp_b = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
863
inst->enc_param.max_qp_i = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
864
inst->enc_param.max_qp_p = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
865
inst->enc_param.max_qp_b = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
868
inst->enc_param.intra_qp = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
873
inst->enc_param.disable_deblk = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
874
inst->enc_param.sao_enable = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
875
inst->enc_param.lf_cross_slice_boundary_enable = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
878
inst->enc_param.disable_deblk = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
879
inst->enc_param.sao_enable = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
880
inst->enc_param.lf_cross_slice_boundary_enable = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
883
inst->enc_param.disable_deblk = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
884
inst->enc_param.sao_enable = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
885
inst->enc_param.lf_cross_slice_boundary_enable = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
892
inst->enc_param.beta_offset_div2 = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
895
inst->enc_param.tc_offset_div2 = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
900
inst->enc_param.decoding_refresh_type = 0;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
903
inst->enc_param.decoding_refresh_type = 1;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
906
inst->enc_param.decoding_refresh_type = 2;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
913
inst->enc_param.intra_period = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
916
inst->enc_param.lossless_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
919
inst->enc_param.const_intra_pred_flag = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
922
inst->enc_param.wpp_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
925
inst->enc_param.strong_intra_smooth_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
928
inst->enc_param.max_num_merge = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
931
inst->enc_param.tmvp_enable = ctrl->val;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
937
inst->enc_param.profile = H264_PROFILE_BP;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
941
inst->enc_param.profile = H264_PROFILE_MP;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
945
inst->enc_param.profile = H264_PROFILE_EXTENDED;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
949
inst->enc_param.profile = H264_PROFILE_HP;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
953
inst->enc_param.profile = H264_PROFILE_HIGH10;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
957
inst->enc_param.profile = H264_PROFILE_HIGH422;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
961
inst->enc_param.profile = H264_PROFILE_HIGH444;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
971
inst->enc_param.level = 10;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
974
inst->enc_param.level = 9;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
977
inst->enc_param.level = 11;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
980
inst->enc_param.level = 12;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
983
inst->enc_param.level = 13;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
986
inst->enc_param.level = 20;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
989
inst->enc_param.level = 21;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
992
inst->enc_param.level = 22;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
995
inst->enc_param.level = 30;
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
998
inst->enc_param.level = 31;
drivers/media/platform/chips-media/wave5/wave5-vpuapi.c
847
static int wave5_check_enc_param(struct vpu_instance *inst, struct enc_param *param)
drivers/media/platform/chips-media/wave5/wave5-vpuapi.c
867
int wave5_vpu_enc_start_one_frame(struct vpu_instance *inst, struct enc_param *param, u32 *fail_res)
drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
842
struct enc_wave_param enc_param;
drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
885
int wave5_vpu_enc_start_one_frame(struct vpu_instance *inst, struct enc_param *param,
drivers/media/platform/chips-media/wave5/wave5.h
115
int wave5_vpu_encode(struct vpu_instance *inst, struct enc_param *option, u32 *fail_res);
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
188
struct venc_enc_param *enc_param)
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
206
venc_enc_param_crop_right(vpu, enc_param);
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
208
venc_enc_param_crop_bottom(enc_param);
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
209
out.base.data[2] = venc_enc_param_num_mb(enc_param);
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
219
out.base.data[0] = enc_param->bitrate;
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
223
out.base.data[0] = enc_param->frm_rate;
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
227
out.base.data[0] = enc_param->gop_size;
drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c
231
out.base.data[0] = enc_param->intra_period;