ehci_writel
ehci_writel(ehci, usb->soc->txfifothresh << 16,
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, temp, portsc_reg);
ehci_writel(ehci, temp, portsc_reg);
ehci_writel(ehci, PORT_CSC, portsc_reg);
ehci_writel(ehci, temp, &ehci->regs->status);
ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
ehci_writel(ehci, temp, status_reg);
ehci_writel(ehci, tmp, &ehci->regs->command);
ehci_writel(ehci, tmp, reg);
ehci_writel(ehci, CMD_RESET, &ehci->regs->command);
ehci_writel(ehci, 0x00800040, &ehci->regs->brcm_insnreg[1]);
ehci_writel(ehci, 0x00000001, &ehci->regs->brcm_insnreg[3]);
ehci_writel(ehci, 0x00800040, &ehci->regs->brcm_insnreg[1]);
ehci_writel(ehci, 0x00000001, &ehci->regs->brcm_insnreg[3]);
ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
ehci_writel(ehci, SBUSCFG_INCR8,
ehci_writel(ehci, tmp, &ehci->regs->command);
ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
ehci_writel(ehci, pdata->pm_usbgenctrl,
ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
ehci_writel(ehci, pdata->pm_configured_flag,
ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
ehci_writel(ehci, tmp, &ehci->regs->command);
ehci_writel(ehci, t1, reg);
ehci_writel(ehci, t1, reg);
ehci_writel(ehci, t1 | PORT_CSC, reg);
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, mask, &ehci->regs->intr_enable);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, temp, &ehci->regs->command);
ehci_writel(ehci, tmp, &ehci->regs->usbmode);
ehci_writel(ehci, command, &ehci->regs->command);
ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, PORT_RWC_BITS,
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
ehci_writel(ehci, 0, &ehci->regs->segment);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
ehci_writel(ehci, INTR_MASK,
ehci_writel(ehci, masked_status, &ehci->regs->status);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
ehci_writel(ehci, temp1 | HOSTPC_PHCD,
ehci_writel(ehci, status | PORT_CSC, reg);
ehci_writel(ehci, temp, status_reg);
ehci_writel(ehci, temp | PORT_SUSPEND,
ehci_writel(ehci, status & ~PORT_PE, reg);
ehci_writel(ehci, temp, status_reg);
ehci_writel(ehci, temp | PORT_POWER, status_reg);
ehci_writel(ehci, temp & ~PORT_POWER, status_reg);
ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
ehci_writel(ehci, t2, reg);
ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
ehci_writel(ehci, t2, reg);
ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
ehci_writel(ehci, STS_IAA, &ehci->regs->status);
ehci_writel(ehci, mask, &ehci->regs->intr_enable);
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, 0, &ehci->regs->segment);
ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, temp & ~HOSTPC_PHCD,
ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
ehci_writel(ehci, port_status, status_reg);
ehci_writel(ehci, port_status, status_reg);
ehci_writel(ehci, status & ~PORT_PE, reg);
ehci_writel(ehci, temp & ~PORT_PE, status_reg);
ehci_writel(ehci, temp | PORT_PEC, status_reg);
ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
ehci_writel(ehci, temp | PORT_RESUME, status_reg);
ehci_writel(ehci, temp | PORT_CSC, status_reg);
ehci_writel(ehci, temp | PORT_OCC, status_reg);
ehci_writel(ehci, temp, status_reg);
ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
ehci_writel(ehci, temp, status_reg);
ehci_writel(ehci, status, &ehci->regs->port_status[0]);
ehci_writel(ehci, status, &ehci->regs->port_status[0]);
ehci_writel(ehci, status, &ehci->regs->port_status[0]);
ehci_writel(ehci, INTEL_QUARK_X1000_EHCI_MAX_THRESHOLD,
ehci_writel(ehci, BCM_USB_FIFO_THRESHOLD,
ehci_writel(ehci, ehci->command | CMD_IAAD,
ehci_writel(ehci, (u32) ehci->async->qh_dma,
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci_writel(ehci, STS_IAA, &ehci->regs->status);