drm_crtc_index
amdgpu_crtc->crtc_id = drm_crtc_index(crtc);
adev->mode_info.crtcs[drm_crtc_index(crtc)] = amdgpu_crtc;
drm_crtc_index(&kcrtc->base));
drm_crtc_index(&kcrtc->base));
drm_crtc_index(crtc),
drm_crtc_index(crtc),
drm_crtc_index(crtc), pipe->id);
BIT(drm_crtc_index(&kcrtc->base)));
1 << drm_crtc_index(&malidp->crtc));
c->state->event->pipe = drm_crtc_index(c);
crtc->id = drm_crtc_index(&crtc->base);
int ret, index = drm_crtc_index(crtc);
state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = fence_ptr;
fence_ptr = state->crtcs[drm_crtc_index(crtc)].out_fence_ptr;
state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = NULL;
drm_dbg_kms(dev, "test CRTC %u primary plane\n", drm_crtc_index(crtc));
unsigned int pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
return drm_vblank_get(crtc->dev, drm_crtc_index(crtc));
drm_vblank_put(crtc->dev, drm_crtc_index(crtc));
int pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
return drm_vblank_crtc(crtc->dev, drm_crtc_index(crtc));
return drm_handle_vblank(crtc->dev, drm_crtc_index(crtc));
pipe = drm_crtc_index(crtc);
pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
unsigned int pipe = drm_crtc_index(crtc);
return drm_vblank_count(crtc->dev, drm_crtc_index(crtc));
return drm_vblank_count_and_time(crtc->dev, drm_crtc_index(crtc),
drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
if (WARN_ON(drm_crtc_index(&primary_crtc->base) >
drm_crtc_index(&secondary_crtc->base)))
drm_crtc_index(&mtk_crtc->base));
drm_crtc_index(&mtk_crtc->base));
drm_crtc_index(&mtk_crtc->base));
drm_crtc_index(&mtk_crtc->base));
int crtc_index = drm_crtc_index(crtc);
mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);
crtc_id = drm_crtc_index(crtc);
&kms->pending_timers[drm_crtc_index(async_crtc)];
crtc_index = drm_crtc_index(crtc);
mutex_unlock(&kms->commit_lock[drm_crtc_index(crtc)]);
ev_thread = &kms->event_thread[drm_crtc_index(crtc)];
nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc),
1 << drm_crtc_index(&rcrtc->crtc));
if (drm_crtc_index(crtc) == 2)
if (drm_crtc_index(crtc) == 0)
pipe = drm_crtc_index(crtc);
if (drm_crtc_index(crtc) == 0)
drm_crtc_index(crtc));
drm_crtc_index(crtc));
DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
crtc->state->event->pipe = drm_crtc_index(crtc);
DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc));
i = drm_crtc_index(crtc);
event->pipe = drm_crtc_index(crtc);
return state->crtcs[drm_crtc_index(crtc)].old_state;
return state->crtcs[drm_crtc_index(crtc)].new_state;
return 1 << drm_crtc_index(crtc);