dma_write
dma_write(0, i, lch);
dma_write(l, CCR, lch);
dma_write(w, GSCR, 0);
.dma_write = dma_write,
p->dma_write(l, CSDP, lch);
p->dma_write(ccr, CCR, lch);
p->dma_write(ccr, CCR2, lch);
p->dma_write(elem_count, CEN, lch);
p->dma_write(frame_count, CFN, lch);
p->dma_write(l, LCH_CTRL, lch);
p->dma_write(w, CSDP, lch);
p->dma_write(l, CCR, lch);
p->dma_write(src_start, CSSA, lch);
p->dma_write(src_ei, CSEI, lch);
p->dma_write(src_fi, CSFI, lch);
p->dma_write(l, CSDP, lch);
p->dma_write(l, CSDP, lch);
p->dma_write(l, CSDP, lch);
p->dma_write(l, CCR, lch);
p->dma_write(dest_start, CDSA, lch);
p->dma_write(dst_ei, CDEI, lch);
p->dma_write(dst_fi, CDFI, lch);
p->dma_write(l, CSDP, lch);
p->dma_write(l, CSDP, lch);
p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
p->dma_write(l, CLNK_CTRL, lch);
p->dma_write(l, CLNK_CTRL, lch);
p->dma_write(dev_id | (1 << 10), CCR, free_ch);
p->dma_write(dev_id, CCR, free_ch);
p->dma_write(0, CCR, lch);
p->dma_write(0, CPC, lch);
p->dma_write(0, CDAC, lch);
p->dma_write(lch, CLNK_CTRL, lch);
p->dma_write(l, CCR, lch);
p->dma_write(l , OCP_SYSCONFIG, 0);
p->dma_write(l, CCR, lch);
p->dma_write(sys_cf, OCP_SYSCONFIG, lch);
p->dma_write(l, CCR, lch);
p->dma_write(0, CICR, lch);
dma_write(chan, from, to, PAGE_SIZE)
dma_write(chan, XILINX_VDMA_REG_ENABLE_VERTICAL_FLIP,
dma_write(chan, XILINX_DMA_REG_PARK_PTR, reg);
dma_write(chan, chan->desc_offset + reg, value);
dma_write(chan, chan->ctrl_offset + reg, value);
retval = dma_write(board, priv, buffer, length);
dma_write(shdma, start, 0, len);
dma_write(pvr2dma, 0, dst, len);
void (*dma_write)(u32 val, int reg, int lch);
chip->ops->dma_write(chip, runtime, pipe, count);
void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
.dma_write = vx2_dma_write,
.dma_write = vx2_dma_write,
.dma_write = vxp_dma_write,