dma_read
l = dma_read(CCR, lch);
l = dma_read(CSR, lch);
dma_read(HW_ID, 0));
dma_read(CAPS_0, 0), dma_read(CAPS_1, 0),
dma_read(CAPS_2, 0), dma_read(CAPS_3, 0),
dma_read(CAPS_4, 0));
w = dma_read(GSCR, 0);
.dma_read = dma_read,
l = p->dma_read(CSDP, lch);
ccr = p->dma_read(CCR, lch);
ccr = p->dma_read(CCR2, lch);
l = p->dma_read(LCH_CTRL, lch);
w = p->dma_read(CSDP, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(CSDP, lch);
l = p->dma_read(CSDP, lch);
l = p->dma_read(CSDP, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(CSDP, lch);
l = p->dma_read(CSDP, lch);
p->dma_read(CSR, lch);
l = p->dma_read(CLNK_CTRL, lch);
l = p->dma_read(CLNK_CTRL, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(OCP_SYSCONFIG, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(CCR, lch);
l = p->dma_read(CCR, lch);
offset = p->dma_read(CPC, lch);
offset = p->dma_read(CSAC, lch);
offset = p->dma_read(CSAC, lch);
if (likely(p->dma_read(CDAC, lch)))
offset = p->dma_read(CSAC, lch);
offset = p->dma_read(CSSA, lch);
offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
offset = p->dma_read(CPC, lch);
offset = p->dma_read(CDAC, lch);
offset = p->dma_read(CDAC, lch);
offset = p->dma_read(CDSA, lch);
offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;
if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN)
csr = p->dma_read(CSR, ch);
p->dma_read(CSR, lch);
dma_read(chan, from, to, PAGE_SIZE)
reg = dma_read(chan, XILINX_VDMA_REG_ENABLE_VERTICAL_FLIP);
reg = dma_read(chan, XILINX_DMA_REG_PARK_PTR);
u32 ctrl_reg = dma_read(chan, XILINX_DMA_REG_DMACR);
chan->config.vflip_en = dma_read(chan,
return dma_read(chan, chan->ctrl_offset + reg);
bool dma_read;
if (i2c->dma_read) {
i2c->dma_read = true;
i2c->dma_read = false;
u32 (*dma_read)(int reg, int lch);
chip->ops->dma_read(chip, runtime, pipe, count);
void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
.dma_read = vx2_dma_read,
.dma_read = vx2_dma_read,
.dma_read = vxp_dma_read,