drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

136

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(hubp)->state);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

205

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

250

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

304

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

515

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(hubp)->state);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

1098

struct dcn_hubp_state *s = &hubp1->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

894

struct dcn_hubp_state *s = &hubp1->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

854

struct dcn_hubp_state state;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1143

struct dcn_hubp_state *s = &hubp2->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1335

struct dcn_hubp_state *s = &hubp2->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

311

struct dcn_hubp_state state;

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.h

118

struct dcn_hubp_state state;

drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.h

107

struct dcn_hubp_state state;

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

447

struct dcn_hubp_state *s = &hubp2->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

829

struct dcn_hubp_state *s = &hubp2->state;

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

648

struct dcn_hubp_state *s = &hubp2->state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

309

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(hubp)->state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

343

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

380

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

406

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4170

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(hubp)->state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

438

struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);