drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4302

kzalloc_obj(struct dc_crtc_timing);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6848

get_output_color_space(const struct dc_crtc_timing *dc_crtc_timing,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6855

if (dc_crtc_timing->flags.Y_ONLY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6861

if (dc_crtc_timing->flags.Y_ONLY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6871

if (dc_crtc_timing->pixel_encoding == PIXEL_ENCODING_RGB)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6878

if (dc_crtc_timing->pixel_encoding == PIXEL_ENCODING_RGB) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6887

} else if (dc_crtc_timing->pix_clk_100hz > 270300) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6888

if (dc_crtc_timing->flags.Y_ONLY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6894

if (dc_crtc_timing->flags.Y_ONLY)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6925

struct dc_crtc_timing *timing_out,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6969

struct dc_crtc_timing *timing_out = &stream->timing;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9673

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

869

struct dc_crtc_timing *timing_requested;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

874

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

166

const struct dc_crtc_timing *timing =

drivers/gpu/drm/amd/display/dc/core/dc.c

1796

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/core/dc.c

1801

struct dc_crtc_timing hw_crtc_timing = {0};

drivers/gpu/drm/amd/display/dc/core/dc.c

7658

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/core/dc.c

7776

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2000

struct timing_generator *tg, struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2062

struct dc_crtc_timing *dc_crtc_timing,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2067

seq_state->steps[*seq_state->num_steps].params.tg_set_vtg_params_params.timing = dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2612

const struct dc_crtc_timing *timing = params->set_odm_bypass_params.timing;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2776

struct dc_crtc_timing *timing = params->tg_set_vtg_params_params.timing;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3386

struct dc_crtc_timing *timing = params->hubp_setup2_params.timing;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3745

(struct dc_crtc_timing *)params->hpo_frl_stream_enc_set_dsc_config_params.timing,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4526

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5002

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1522

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2216

const struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3723

sizeof(struct dc_crtc_timing)) != 0;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3890

static int get_norm_pix_clk(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4616

const struct dc_crtc_timing *timing, struct dsc_padding_params *dsc_padding_params)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5107

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5115

const struct dc_crtc_timing *tg = timing;

drivers/gpu/drm/amd/display/dc/dc.h

2073

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dc.h

2141

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc.h

2382

const struct dc_crtc_timing *crtc_timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

592

struct dc_crtc_timing *main_timing = &subvp_pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

593

struct dc_crtc_timing *phantom_timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

594

struct dc_crtc_timing *drr_timing = &vblank_pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

732

struct dc_crtc_timing *phantom_timing0 = NULL;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

733

struct dc_crtc_timing *phantom_timing1 = NULL;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

797

struct dc_crtc_timing *main_timing = &subvp_pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

798

struct dc_crtc_timing *phantom_timing;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

36

struct dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/dc_dsc.h

102

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc_dsc.h

109

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dc_dsc.h

116

void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc_dsc.h

85

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc_dsc.h

94

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc_dsc.h

98

uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dc_stream.h

180

struct dc_crtc_timing timing;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

764

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

813

const struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

849

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

860

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

216

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

220

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

224

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

269

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

286

struct dc_crtc_timing hw_crtc_timing = *crtc_timing;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

520

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

549

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

666

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

692

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1116

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1414

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1956

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2023

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2040

bool dce110_is_two_pixels_per_container(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

257

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

283

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

287

struct dc_crtc_timing patched_crtc_timing;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

290

uint32_t vsync_offset = dc_crtc_timing->v_border_bottom +

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

291

dc_crtc_timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

292

uint32_t v_sync_start = dc_crtc_timing->v_addressable + vsync_offset;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

294

uint32_t hsync_offset = dc_crtc_timing->h_border_right +

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

295

dc_crtc_timing->h_front_porch;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

296

uint32_t h_sync_start = dc_crtc_timing->h_addressable + hsync_offset;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

304

patched_crtc_timing = *dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

603

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

67

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

129

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

137

const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

203

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

247

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

259

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

274

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

292

bool dce110_is_two_pixels_per_container(const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

243

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

386

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

436

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

103

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

129

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

431

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

625

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

696

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

755

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

109

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

127

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

109

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

133

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

570

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

619

const struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

661

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

551

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

555

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

559

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

563

const struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

247

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

264

struct dc_crtc_timing hw_crtc_timing = *crtc_timing;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

467

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

483

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

603

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

652

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

659

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

665

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

734

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

459

static bool is_two_pixels_per_containter(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

564

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h

101

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c

53

const struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

534

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

580

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

107

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

147

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

277

static bool is_two_pixels_per_containter(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

317

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

322

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

105

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

235

static bool is_two_pixels_per_containter(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

65

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

267

static bool is_two_pixels_per_containter(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

53

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

92

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

107

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

256

static bool is_two_pixels_per_containter(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

441

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

461

struct dc_crtc_timing hw_crtc_timing = *crtc_timing;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

67

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

848

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

210

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

213

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

219

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

237

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

37

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_stream_encoder.c

31

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_stream_encoder.c

44

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_stream_encoder.c

55

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1110

const struct dc_crtc_timing *dc_crtc_timing, unsigned int *vstartup_start)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1112

struct dc_crtc_timing patched_crtc_timing;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1117

patched_crtc_timing = *dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1356

struct dc_crtc_timing *timing = &res_ctx->pipe_ctx[i].stream->timing;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

759

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

824

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

76

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

79

void hpo_fpu_enc3_validate_hdmi_frl_output_timing(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

284

static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

296

static unsigned int get_vertical_back_porch(struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

323

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

806

struct dc_crtc_timing *main_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

807

struct dc_crtc_timing *phantom_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

808

struct dc_crtc_timing *drr_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

915

struct dc_crtc_timing *main_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

916

struct dc_crtc_timing *phantom_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

917

struct dc_crtc_timing *vblank_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

415

static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

427

static unsigned int get_vertical_back_porch(struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

456

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

447

static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

459

static unsigned int get_vertical_back_porch(struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

488

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

440

bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

445

struct dc_crtc_timing *main_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

446

struct dc_crtc_timing *phantom_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

535

struct dc_crtc_timing *main_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

536

struct dc_crtc_timing *phantom_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

537

struct dc_crtc_timing *vblank_timing = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.h

50

bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

245

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1106

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1238

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1300

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1455

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1535

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1731

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1997

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

2019

uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

2036

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

2061

void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

318

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

325

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

331

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

351

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

363

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

501

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

564

static int hdmi_dsc_get_num_slices(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

62

const struct dc_crtc_timing *timing, const uint32_t kbps)

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

620

static int hdmi_dsc_get_bpp(const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

932

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

94

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

966

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

154

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

472

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

837

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.h

366

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.h

381

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.h

410

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

186

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

207

struct dc_crtc_timing hw_crtc_timing = *crtc_timing;

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

194

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

484

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h

272

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h

287

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

186

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

350

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

265

struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

362

struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

285

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.h

96

struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1400

struct dc_crtc_timing *crtc_timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

670

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

725

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2433

struct dc_crtc_timing *hw_crtc_timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3968

struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3981

const struct dc_crtc_timing *dc_crtc_timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3982

struct dc_crtc_timing patched_crtc_timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3987

patched_crtc_timing = *dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4011

const struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4027

const struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3038

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

85

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1476

struct dc_crtc_timing *timing = &pipe_ctx[i]->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1526

struct dc_crtc_timing *timing = &pipe_ctx[i]->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1552

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

815

struct dc_crtc_timing patched_crtc_timing = stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

968

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1981

struct timing_generator *optc, struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1995

struct timing_generator *tg, struct dc_crtc_timing *dc_crtc_timing, bool program_fp2);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2243

struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

234

const struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2434

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

313

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

62

struct dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

673

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

856

const struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h

204

const struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

170

struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/opp.h

341

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

158

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

191

const struct dc_crtc_timing *dc_crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

194

bool optc1_is_two_pixels_per_container(const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

69

struct dc_crtc_timing orginal_patched_timing;

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

75

bool optc1_get_hw_timing(struct timing_generator *tg, struct dc_crtc_timing *hw_crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

78

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

81

const struct dc_crtc_timing *dc_crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

111

struct dc_crtc_timing timing;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

147

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

154

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

160

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

165

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

36

struct dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

374

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

424

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

483

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

549

struct dc_crtc_timing *crtc_timing,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

328

struct dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

337

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

339

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

379

const struct dc_crtc_timing *otg_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

411

bool enable, const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

433

const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

450

bool (*is_two_pixels_per_container)(const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

469

struct dc_crtc_timing *hw_crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

472

const struct dc_crtc_timing *dc_crtc_timing, bool program_fp2);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

480

void (*set_odm_bypass)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

499

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/inc/link_service.h

140

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/inc/link_service.h

304

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

52

struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

792

struct dc_crtc_timing patched_crtc_timing = stream->timing;

drivers/gpu/drm/amd/display/dc/link/link_validation.c

135

struct dc_crtc_timing outputTiming = *timing;

drivers/gpu/drm/amd/display/dc/link/link_validation.c

39

static uint32_t get_tmds_output_pixel_clock_100hz(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/link/link_validation.c

457

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/link/link_validation.c

466

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/link/link_validation.c

526

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/link/link_validation.c

58

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/link/link_validation.c

607

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/link/link_validation.c

856

const struct dc_crtc_timing *timing = audio_params->crtc_timing;

drivers/gpu/drm/amd/display/dc/link/link_validation.h

34

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/link/link_validation.h

40

const struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/link/link_validation.h

46

uint32_t link_timing_bandwidth_kbps(const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

1005

struct dc_crtc_timing tmp_timing = stream->timing;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

346

struct dc_crtc_timing *crtc_timing)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h

68

struct dc_crtc_timing *crtc_timing);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1056

struct dc_crtc_timing *timing,

drivers/gpu/drm/amd/display/dc/opp/dcn10/dcn10_opp.c

328

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/opp/dcn10/dcn10_opp.h

185

const struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1253

const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1286

const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1312

struct dc_crtc_timing *hw_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

158

const struct dc_crtc_timing *dc_crtc_timing,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1616

bool optc1_is_two_pixels_per_container(const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

168

struct dc_crtc_timing patched_crtc_timing;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

186

patched_crtc_timing = *dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

294

optc->funcs->set_vtg_params(optc, dc_crtc_timing, true);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

347

const struct dc_crtc_timing *dc_crtc_timing, bool program_fp2)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

349

struct dc_crtc_timing patched_crtc_timing;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

357

patched_crtc_timing = *dc_crtc_timing;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

52

static void apply_front_porch_workaround(struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

593

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

162

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

173

h_div_2 = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

110

const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

70

const struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

202

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

215

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

363

const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

165

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

178

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

229

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

242

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h

192

const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

268

const struct dc_crtc_timing *dc_crtc_timing)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

281

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

188

const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1908

struct dc_crtc_timing timing;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2049

struct dc_crtc_timing *timing = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2076

struct dc_crtc_timing *timing = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1812

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1840

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1781

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2044

struct dc_crtc_timing *timing;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

432

struct dc_crtc_timing *timing = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

490

struct dc_crtc_timing *timing = NULL;