dev_config
.dev_config = ahci_dev_config,
if (ap->ops->dev_config)
ap->ops->dev_config(dev);
.dev_config = ali_lock_sectors,
.dev_config = ali_lock_sectors,
.dev_config = ali_lock_sectors,
.dev_config = ali_warn_atapi_dma,
.dev_config = it821x_dev_config,
.dev_config = octeon_cf_dev_config,
.dev_config = pdc2026x_dev_config,
.dev_config = mv6_dev_config,
.dev_config = ATA_OP_NULL,
.dev_config = sil_dev_config,
.dev_config = sil24_dev_config,
dev_config.type = CDX_DEV_RESET_CONF;
cdx_dev->dev_num, &dev_config);
struct cdx_device_config dev_config;
dev_config.type = CDX_DEV_BUS_MASTER_CONF;
dev_config.bus_master_enable = true;
cdx_dev->dev_num, &dev_config);
struct cdx_device_config dev_config;
dev_config.type = CDX_DEV_BUS_MASTER_CONF;
dev_config.bus_master_enable = false;
cdx_dev->dev_num, &dev_config);
struct cdx_device_config dev_config = {0};
struct cdx_device_config dev_config;
dev_config.msi.msi_index = msi_desc->msi_index;
dev_config.msi.data = msi_desc->msg.data;
dev_config.msi.addr = ((u64)(msi_desc->msg.address_hi) << 32) | msi_desc->msg.address_lo;
dev_config.type = CDX_DEV_MSI_CONF;
cdx->ops->dev_configure(cdx, cdx_dev->bus_num, cdx_dev->dev_num, &dev_config);
struct cdx_device_config dev_config;
dev_config.type = CDX_DEV_MSI_ENABLE;
dev_config.msi_enable = true;
&dev_config);
struct cdx_device_config dev_config;
dev_config.type = CDX_DEV_MSI_ENABLE;
dev_config.msi_enable = false;
cdx->ops->dev_configure(cdx, cdx_dev->bus_num, cdx_dev->dev_num, &dev_config);
struct cdx_device_config *dev_config)
switch (dev_config->type) {
msi_index = dev_config->msi.msi_index;
data = dev_config->msi.data;
addr = dev_config->msi.addr;
dev_config->bus_master_enable);
ret = cdx_mcdi_msi_enable(cdx->priv, bus_num, dev_num, dev_config->msi_enable);
hw_data->dev_config = adf_gen4_dev_config;
hw_data->dev_config = adf_gen4_dev_config;
hw_data->dev_config = dev_config;
hw_data->dev_config = adf_gen2_dev_config;
hw_data->dev_config = adf_gen2_dev_config;
hw_data->dev_config = adf_gen2_dev_config;
hw_data->dev_config = adf_gen2_dev_config;
int (*dev_config)(struct adf_accel_dev *accel_dev);
if (config && GET_HW_DATA(accel_dev)->dev_config) {
ret = GET_HW_DATA(accel_dev)->dev_config(accel_dev);
return GET_HW_DATA(accel_dev)->dev_config(accel_dev);
hw_data->dev_config = adf_gen2_dev_config;
hw_data->dev_config = adf_gen2_dev_config;
struct em28xx_eeprom *dev_config;
dev_config = (void *)*eedata;
switch (le16_to_cpu(dev_config->chip_conf) >> 4 & 0x3) {
if (le16_to_cpu(dev_config->chip_conf) & 1 << 3)
if (le16_to_cpu(dev_config->chip_conf) & 1 << 2)
switch (le16_to_cpu(dev_config->chip_conf) & 0x3) {
dev_config->string_idx_table,
le16_to_cpu(dev_config->string1),
le16_to_cpu(dev_config->string2),
le16_to_cpu(dev_config->string3));
char dev_config[TCMU_CONFIG_LEN];
if (udev->dev_config[0])
udev->name, udev->dev_config);
if (match_strlcpy(udev->dev_config, &args[0],
pr_debug("TCMU: Referencing Path: %s\n", udev->dev_config);
udev->dev_config[0] ? udev->dev_config : "NULL");
return snprintf(page, PAGE_SIZE, "%s\n", udev->dev_config);
strscpy(udev->dev_config, page, TCMU_CONFIG_LEN);
strscpy(udev->dev_config, page, TCMU_CONFIG_LEN);
CONFIGFS_ATTR(tcmu_, dev_config);
.write = dev_config,
struct cdx_device_config *dev_config);
void (*dev_config)(struct ata_device *dev);
struct regmap_config *dev_config;
dev_config = devm_kmemdup(dev, &class_dev_regmap_config,
sizeof(*dev_config), GFP_KERNEL);
if (!dev_config)
dev_config->lock_arg = &drv->regmap_lock;
drv->dev_regmap = devm_regmap_init_sdw(sdw, dev_config);