desc_phys
dma_addr_t desc_phys = dma_map_single(sdcp->dev, desc, sizeof(*desc),
dma_err = dma_mapping_error(sdcp->dev, desc_phys);
writel(desc_phys, sdcp->base + MXS_DCP_CH_N_CMDPTR(chan));
dma_unmap_single(sdcp->dev, desc_phys, sizeof(*desc), DMA_TO_DEVICE);
dma_addr_t desc_phys;
&desc->desc_phys);
dma_pool_free(jzchan->desc_pool, desc->desc, desc->desc_phys);
dma_addr_t desc_phys;
desc_phys = jzchan->desc->desc_phys +
jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DDA, desc_phys);
ldma_chan_desc_hw_cfg(c, c->ds->desc_phys, c->ds->desc_cnt);
dma_addr_t desc_phys;
dma_addr_t desc_phys;
c->desc_phys = desc_base;
ldma_chan_desc_hw_cfg(c, c->desc_phys, c->desc_cnt);
dma_pool_free(c->desc_pool, ds->desc_hw, ds->desc_phys);
&ds->desc_phys);
u32 desc_phys;
desc_phys = lower_32_bits(c->desc_phys);
desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
reg |= desc_phys;
u32 desc_phys;
desc_phys = cppi41_pop_desc(cdd, cdd->td_queue.complete);
if (!desc_phys && c->is_tx)
desc_phys = cppi41_pop_desc(cdd, c->q_comp_num);
if (desc_phys == c->desc_phys) {
} else if (desc_phys == td_desc_phys) {
} else if (desc_phys) {
desc_phys = cppi41_pop_desc(cdd, c->q_num);
if (!desc_phys)
desc_phys = cppi41_pop_desc(cdd, c->q_comp_num);
WARN_ON(!desc_phys);
u32 desc_phys;
desc_phys = lower_32_bits(c->desc_phys);
desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
cchan->desc_phys = cdd->descs_phys;
cchan->desc_phys += i * sizeof(struct cppi41_desc);
dma_addr_t desc_phys;
&ring->desc_phys, GFP_KERNEL);
wed_w32(dev, MTK_WED_RROQ_BASE_L, dev->rro.ring.desc_phys);
wed_w32(dev, MTK_WED_TX_BM_BASE, dev->tx_buf_ring.desc_phys);
&ring->desc_phys, GFP_KERNEL);
wdma->desc_phys);
wdma->desc_phys);
wdma->desc_phys);
wdma->desc_phys);
wpdma_tx_w32(dev, idx, MTK_WED_RING_OFS_BASE, ring->desc_phys);
ring->desc_phys);
wpdma_rx_w32(dev, idx, MTK_WED_RING_OFS_BASE, ring->desc_phys);
ring->desc_phys);
dma_addr_t desc_phys;
&desc_phys, GFP_KERNEL);
dev->tx_buf_ring.desc_phys = desc_phys;
dev->tx_buf_ring.desc_phys);
dma_addr_t desc_phys;
&desc_phys, GFP_KERNEL);
dev->hw_rro.desc_phys = desc_phys;
dma_addr_t desc_phys;
&desc_phys, GFP_KERNEL);
dev->rx_buf_ring.desc_phys = desc_phys;
desc, dev->hw_rro.desc_phys);
desc, dev->rx_buf_ring.desc_phys);
wed_w32(dev, MTK_WED_RRO_PG_BM_BASE, dev->hw_rro.desc_phys);
wed_w32(dev, MTK_WED_RX_BM_BASE, dev->rx_buf_ring.desc_phys);
ring->desc, ring->desc_phys);
desc_dma = desc_phys(pool, desc);
chan_write(chan, hdp, desc_phys(pool, chan->head));
chan_write(chan, hdp, desc_phys(pool, chan->head));
desc_dma = desc_phys(pool, desc);
dma_addr_t desc_phys;
dma_addr_t desc_phys;
dma_addr_t desc_phys;
dma_addr_t desc_phys;