arch/powerpc/platforms/52xx/mpc52xx_pci.c

77

u32 cr2; /* PCI + 0x3C */

arch/s390/kernel/nmi.c

283

union ctlreg2 cr2;

arch/s390/kernel/nmi.c

321

cr2.reg = get_lowcore()->cregs_save_area[2];

arch/s390/kernel/nmi.c

322

if (cr2.gse && !mci.gs && !test_cpu_flag(CIF_MCCK_GUEST))

arch/s390/kernel/setup.c

789

union ctlreg2 cr2;

arch/s390/kernel/setup.c

798

local_ctl_store(2, &cr2.reg);

arch/s390/kernel/setup.c

801

cr2.ducto = (unsigned long)__ctl_duct >> 6;

arch/s390/kernel/setup.c

804

system_ctl_load(2, &cr2.reg);

arch/x86/coco/sev/vc-handle.c

116

write_cr2(ctxt->fi.cr2);

arch/x86/coco/sev/vc-handle.c

144

ctxt->fi.cr2 = ctxt->regs->ip;

arch/x86/coco/sev/vc-handle.c

150

ctxt->fi.cr2 = 0;

arch/x86/coco/sev/vc-handle.c

172

ctxt->fi.cr2 = ctxt->regs->ip;

arch/x86/coco/sev/vc-handle.c

271

ctxt->fi.cr2 = (unsigned long)dst;

arch/x86/coco/sev/vc-handle.c

349

ctxt->fi.cr2 = (unsigned long)src;

arch/x86/coco/sev/vc-handle.c

459

native_write_cr2(ctxt->fi.cr2);

arch/x86/coco/sev/vc-handle.c

53

ctxt->fi.cr2 = vaddr;

arch/x86/coco/sev/vc-shared.c

132

ctxt->fi.cr2 = address;

arch/x86/entry/vsyscall/vsyscall_64.c

109

thread->cr2 = ptr;

arch/x86/hyperv/hv_crash.c

172

asm volatile("movq %0, %%cr2" : : "r"(hv_crash_ctxt.cr2));

arch/x86/hyperv/hv_crash.c

207

asm volatile("movq %%cr2, %0" : "=r"(ctxt->cr2));

arch/x86/hyperv/hv_crash.c

60

ulong cr2;

arch/x86/hyperv/mshv-asm-offsets.c

35

OFFSET(MSHV_VTL_CPU_CONTEXT_cr2, mshv_vtl_cpu_context, cr2);

arch/x86/include/asm/kvm_host.h

829

unsigned long cr2;

arch/x86/include/asm/mshyperv.h

281

u64 cr2;

arch/x86/include/asm/processor.h

489

unsigned long cr2;

arch/x86/include/asm/sev.h

40

unsigned long cr2;

arch/x86/include/asm/suspend_32.h

16

unsigned long cr0, cr2, cr3, cr4;

arch/x86/include/asm/suspend_64.h

42

unsigned long cr0, cr2, cr3, cr4;

arch/x86/include/asm/svm.h

363

u64 cr2;

arch/x86/include/asm/svm.h

428

u64 cr2;

arch/x86/include/asm/xen/interface_32.h

76

unsigned long cr2;

arch/x86/include/asm/xen/interface_64.h

137

unsigned long cr2;

arch/x86/include/uapi/asm/kvm.h

155

__u64 cr0, cr2, cr3, cr4, cr8;

arch/x86/include/uapi/asm/kvm.h

166

__u64 cr0, cr2, cr3, cr4, cr8;

arch/x86/include/uapi/asm/sigcontext.h

232

__u32 cr2;

arch/x86/include/uapi/asm/sigcontext.h

264

__u64 cr2;

arch/x86/include/uapi/asm/sigcontext.h

322

__u32 cr2;

arch/x86/include/uapi/asm/sigcontext.h

379

__u64 cr2;

arch/x86/kernel/asm-offsets.c

81

OFFSET(XEN_vcpu_info_arch_cr2, vcpu_info, arch.cr2);

arch/x86/kernel/asm-offsets_64.c

50

ENTRY(cr2);

arch/x86/kernel/doublefault_32.c

26

unsigned long cr2;

arch/x86/kernel/doublefault_32.c

31

cr2 = native_read_cr2();

arch/x86/kernel/doublefault_32.c

73

exc_double_fault(&regs, 0, cr2);

arch/x86/kernel/process_32.c

62

unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;

arch/x86/kernel/process_32.c

81

cr2 = read_cr2();

arch/x86/kernel/process_32.c

85

log_lvl, cr0, cr2, cr3, cr4);

arch/x86/kernel/process_64.c

117

cr2 = read_cr2();

arch/x86/kernel/process_64.c

126

log_lvl, cr2, cr3, cr4);

arch/x86/kernel/process_64.c

73

unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;

arch/x86/kernel/signal_32.c

246

unsafe_put_user(current->thread.cr2, &sc->cr2, Efault);

arch/x86/kernel/signal_64.c

132

unsafe_put_user(current->thread.cr2, &sc->cr2, Efault);

arch/x86/kernel/umip.c

316

tsk->thread.cr2 = (unsigned long)addr;

arch/x86/kvm/svm/nested.c

1273

vmcb12->save.cr2 = vcpu->arch.cr2;

arch/x86/kvm/svm/nested.c

1704

vmcb->control.exit_info_2 = vcpu->arch.cr2;

arch/x86/kvm/svm/nested.c

604

to->cr2 = from->cr2;

arch/x86/kvm/svm/nested.c

797

svm->vcpu.arch.cr2 = save->cr2;

arch/x86/kvm/svm/svm.c

2629

val = vcpu->arch.cr2;

arch/x86/kvm/svm/svm.c

3529

"cr0:", save->cr0, "cr2:", save->cr2);

arch/x86/kvm/svm/svm.c

4517

svm->vmcb->save.cr2 = vcpu->arch.cr2;

arch/x86/kvm/svm/svm.c

4567

vcpu->arch.cr2 = svm->vmcb->save.cr2;

arch/x86/kvm/svm/svm.h

170

u64 cr2;

arch/x86/kvm/vmx/nested.c

4074

exit_qual = vcpu->arch.cr2;

arch/x86/kvm/vmx/vmx.c

5370

unsigned long cr2 = vmx_get_exit_qual(vcpu);

arch/x86/kvm/vmx/vmx.c

5389

kvm_fixup_and_inject_pf_error(vcpu, cr2, error_code);

arch/x86/kvm/vmx/vmx.c

5401

kvm_fixup_and_inject_pf_error(vcpu, cr2, error_code);

arch/x86/kvm/vmx/vmx.c

5406

return kvm_handle_page_fault(vcpu, error_code, cr2, NULL, 0);

arch/x86/kvm/vmx/vmx.c

7478

if (vcpu->arch.cr2 != native_read_cr2())

arch/x86/kvm/vmx/vmx.c

7479

native_write_cr2(vcpu->arch.cr2);

arch/x86/kvm/vmx/vmx.c

7483

vcpu->arch.cr2 = native_read_cr2();

arch/x86/kvm/x86.c

12195

sregs->cr2 = vcpu->arch.cr2;

arch/x86/kvm/x86.c

12415

vcpu->arch.cr2 = sregs->cr2;

arch/x86/kvm/x86.c

13006

vcpu->arch.cr2 = 0;

arch/x86/kvm/x86.c

802

vcpu->arch.cr2 = ex->payload;

arch/x86/kvm/x86.c

8568

value = vcpu->arch.cr2;

arch/x86/kvm/x86.c

8597

vcpu->arch.cr2 = val;

arch/x86/kvm/xen.h

217

unsigned int cr2;

arch/x86/mm/fault.c

641

tsk->thread.cr2 = address;

arch/x86/power/cpu.c

126

ctxt->cr2 = read_cr2();

arch/x86/power/cpu.c

216

write_cr2(ctxt->cr2);

arch/x86/um/shared/sysdep/faultinfo_32.h

20

unsigned long cr2; /* in ptrace_faultinfo called addr */

arch/x86/um/shared/sysdep/faultinfo_32.h

25

#define FAULT_ADDRESS(fi) ((fi).cr2)

arch/x86/um/shared/sysdep/faultinfo_64.h

20

unsigned long cr2; /* in ptrace_faultinfo called addr */

arch/x86/um/shared/sysdep/faultinfo_64.h

25

#define FAULT_ADDRESS(fi) ((fi).cr2)

arch/x86/um/shared/sysdep/mcontext.h

24

(fi).cr2 = (mc)->cr2; \

arch/x86/um/shared/sysdep/mcontext.h

33

(fi).cr2 = (mc)->gregs[REG_CR2]; \

arch/x86/um/signal.c

146

sc.cr2 = fi->cr2;

arch/x86/xen/mmu_pv.c

1294

static noinstr void xen_write_cr2(unsigned long cr2)

arch/x86/xen/mmu_pv.c

1296

this_cpu_read(xen_vcpu)->arch.cr2 = cr2;

drivers/clk/clk-si521xx.c

42

#define SI521XX_OE_MAP(cr1, cr2) (((cr2) << 8) | (cr1))

drivers/i2c/busses/i2c-ls2x-v2.c

302

u32 status, ien, event, cr2, possible_status;

drivers/i2c/busses/i2c-ls2x-v2.c

310

regmap_read(priv->regmap, LOONGSON2_I2C_CR2, &cr2);

drivers/i2c/busses/i2c-ls2x-v2.c

311

ien = cr2 & LOONGSON2_I2C_CR2_INT_MASK;

drivers/i2c/busses/i2c-stm32f4.c

154

u32 cr2 = 0;

drivers/i2c/busses/i2c-stm32f4.c

181

cr2 |= STM32F4_I2C_CR2_FREQ(freq);

drivers/i2c/busses/i2c-stm32f4.c

182

writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2);

drivers/i2c/busses/i2c-stm32f4.c

557

u32 status, ien, event, cr2;

drivers/i2c/busses/i2c-stm32f4.c

559

cr2 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR2);

drivers/i2c/busses/i2c-stm32f4.c

560

ien = cr2 & STM32F4_I2C_CR2_IRQ_MASK;

drivers/i2c/busses/i2c-stm32f4.c

590

cr2 |= STM32F4_I2C_CR2_ITBUFEN;

drivers/i2c/busses/i2c-stm32f4.c

591

writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

1010

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1021

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1033

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1052

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1065

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1082

cr2 |= STM32F7_I2C_CR2_PECBYTE;

drivers/i2c/busses/i2c-stm32f7.c

1087

cr2 &= ~STM32F7_I2C_CR2_PECBYTE;

drivers/i2c/busses/i2c-stm32f7.c

1091

cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK | STM32F7_I2C_CR2_RELOAD);

drivers/i2c/busses/i2c-stm32f7.c

1092

cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count);

drivers/i2c/busses/i2c-stm32f7.c

1106

cr2 & STM32F7_I2C_CR2_RD_WRN,

drivers/i2c/busses/i2c-stm32f7.c

1117

if (cr2 & STM32F7_I2C_CR2_RD_WRN)

drivers/i2c/busses/i2c-stm32f7.c

1122

if (cr2 & STM32F7_I2C_CR2_RD_WRN)

drivers/i2c/busses/i2c-stm32f7.c

1129

cr2 |= STM32F7_I2C_CR2_START;

drivers/i2c/busses/i2c-stm32f7.c

1135

writel_relaxed(cr2, base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

1144

u32 cr1, cr2;

drivers/i2c/busses/i2c-stm32f7.c

1147

cr2 = readl_relaxed(base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

1151

cr2 |= STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

1164

cr2 |= STM32F7_I2C_CR2_RELOAD;

drivers/i2c/busses/i2c-stm32f7.c

1173

cr2 |= STM32F7_I2C_CR2_PECBYTE;

drivers/i2c/busses/i2c-stm32f7.c

1178

cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK);

drivers/i2c/busses/i2c-stm32f7.c

1179

cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count);

drivers/i2c/busses/i2c-stm32f7.c

1200

cr2 & STM32F7_I2C_CR2_RD_WRN,

drivers/i2c/busses/i2c-stm32f7.c

1217

cr2 |= STM32F7_I2C_CR2_START;

drivers/i2c/busses/i2c-stm32f7.c

1221

writel_relaxed(cr2, base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

1438

u32 cr2, mask;

drivers/i2c/busses/i2c-stm32f7.c

1463

cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

1464

cr2 |= STM32F7_I2C_CR2_NBYTES(1);

drivers/i2c/busses/i2c-stm32f7.c

1465

writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

196

u32 cr2;

drivers/i2c/busses/i2c-stm32f7.c

2416

backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

2448

writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

806

u32 cr2;

drivers/i2c/busses/i2c-stm32f7.c

811

cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

813

cr2 &= ~STM32F7_I2C_CR2_NBYTES_MASK;

drivers/i2c/busses/i2c-stm32f7.c

815

cr2 |= STM32F7_I2C_CR2_NBYTES(STM32F7_I2C_MAX_LEN);

drivers/i2c/busses/i2c-stm32f7.c

817

cr2 &= ~STM32F7_I2C_CR2_RELOAD;

drivers/i2c/busses/i2c-stm32f7.c

818

cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count);

drivers/i2c/busses/i2c-stm32f7.c

821

writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

827

u32 cr2;

drivers/i2c/busses/i2c-stm32f7.c

841

cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

842

cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK | STM32F7_I2C_CR2_RELOAD);

drivers/i2c/busses/i2c-stm32f7.c

843

cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count);

drivers/i2c/busses/i2c-stm32f7.c

844

writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

880

u32 cr1, cr2;

drivers/i2c/busses/i2c-stm32f7.c

890

cr2 = readl_relaxed(base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

893

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

895

cr2 |= STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

898

cr2 &= ~(STM32F7_I2C_CR2_HEAD10R | STM32F7_I2C_CR2_ADD10);

drivers/i2c/busses/i2c-stm32f7.c

900

cr2 &= ~STM32F7_I2C_CR2_SADD10_MASK;

drivers/i2c/busses/i2c-stm32f7.c

901

cr2 |= STM32F7_I2C_CR2_SADD10(f7_msg->addr);

drivers/i2c/busses/i2c-stm32f7.c

902

cr2 |= STM32F7_I2C_CR2_ADD10;

drivers/i2c/busses/i2c-stm32f7.c

904

cr2 &= ~STM32F7_I2C_CR2_SADD7_MASK;

drivers/i2c/busses/i2c-stm32f7.c

905

cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr);

drivers/i2c/busses/i2c-stm32f7.c

909

cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK | STM32F7_I2C_CR2_RELOAD);

drivers/i2c/busses/i2c-stm32f7.c

911

cr2 |= STM32F7_I2C_CR2_NBYTES(STM32F7_I2C_MAX_LEN);

drivers/i2c/busses/i2c-stm32f7.c

912

cr2 |= STM32F7_I2C_CR2_RELOAD;

drivers/i2c/busses/i2c-stm32f7.c

914

cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count);

drivers/i2c/busses/i2c-stm32f7.c

962

cr2 |= STM32F7_I2C_CR2_START;

drivers/i2c/busses/i2c-stm32f7.c

968

writel_relaxed(cr2, base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

978

u32 cr1, cr2;

drivers/i2c/busses/i2c-stm32f7.c

984

cr2 = readl_relaxed(base + STM32F7_I2C_CR2);

drivers/i2c/busses/i2c-stm32f7.c

988

cr2 &= ~STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

990

cr2 |= STM32F7_I2C_CR2_RD_WRN;

drivers/i2c/busses/i2c-stm32f7.c

993

cr2 &= ~(STM32F7_I2C_CR2_ADD10 | STM32F7_I2C_CR2_SADD7_MASK);

drivers/i2c/busses/i2c-stm32f7.c

994

cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr);

drivers/iio/trigger/stm32-timer-trigger.c

295

u32 cr2;

drivers/iio/trigger/stm32-timer-trigger.c

297

regmap_read(priv->regmap, TIM_CR2, &cr2);

drivers/iio/trigger/stm32-timer-trigger.c

300

cr2 = (cr2 & TIM_CR2_MMS2) >> TIM_CR2_MMS2_SHIFT;

drivers/iio/trigger/stm32-timer-trigger.c

302

cr2 = (cr2 & TIM_CR2_MMS) >> TIM_CR2_MMS_SHIFT;

drivers/iio/trigger/stm32-timer-trigger.c

304

return sysfs_emit(buf, "%s\n", master_mode_table[cr2]);

drivers/iio/trigger/stm32-timer-trigger.c

84

u32 cr2;

drivers/iio/trigger/stm32-timer-trigger.c

849

regmap_read(priv->regmap, TIM_CR2, &priv->bak.cr2);

drivers/iio/trigger/stm32-timer-trigger.c

875

regmap_write(priv->regmap, TIM_CR2, priv->bak.cr2);

drivers/net/phy/realtek/realtek_main.c

1117

u16 cr1, cr2;

drivers/net/phy/realtek/realtek_main.c

1138

cr2 = ret >> RTL8211E_LEDCR2_SHIFT * index;

drivers/net/phy/realtek/realtek_main.c

1139

if (cr2 & RTL8211E_LEDCR2_LINK_10)

drivers/net/phy/realtek/realtek_main.c

1142

if (cr2 & RTL8211E_LEDCR2_LINK_100)

drivers/net/phy/realtek/realtek_main.c

1145

if (cr2 & RTL8211E_LEDCR2_LINK_1000)

drivers/net/phy/realtek/realtek_main.c

1148

if ((cr2 & RTL8211E_LEDCR2_LINK_10) &&

drivers/net/phy/realtek/realtek_main.c

1149

(cr2 & RTL8211E_LEDCR2_LINK_100) &&

drivers/net/phy/realtek/realtek_main.c

1150

(cr2 & RTL8211E_LEDCR2_LINK_1000)) {

drivers/net/phy/realtek/realtek_main.c

1164

u16 cr1 = 0, cr2 = 0;

drivers/net/phy/realtek/realtek_main.c

1183

cr2 |= RTL8211E_LEDCR2_LINK_10;

drivers/net/phy/realtek/realtek_main.c

1188

cr2 |= RTL8211E_LEDCR2_LINK_100;

drivers/net/phy/realtek/realtek_main.c

1193

cr2 |= RTL8211E_LEDCR2_LINK_1000;

drivers/net/phy/realtek/realtek_main.c

1196

cr2 <<= RTL8211E_LEDCR2_SHIFT * index;

drivers/net/phy/realtek/realtek_main.c

1198

RTL8211E_LEDCR2, cr2mask, cr2);

drivers/spi/spi-stm32.c

1332

u32 cr2 = 0;

drivers/spi/spi-stm32.c

1336

cr2 |= STM32FX_SPI_CR2_TXEIE;

drivers/spi/spi-stm32.c

1344

cr2 |= STM32FX_SPI_CR2_RXNEIE | STM32FX_SPI_CR2_ERRIE;

drivers/spi/spi-stm32.c

1351

stm32_spi_set_bits(spi, STM32FX_SPI_CR2, cr2);

drivers/tty/serial/fsl_lpuart.c

1131

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

1134

cr2 = readb(sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1135

cr2 &= ~UARTCR2_RE;

drivers/tty/serial/fsl_lpuart.c

1136

writeb(cr2, sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1162

cr2 |= UARTCR2_RE;

drivers/tty/serial/fsl_lpuart.c

1163

writeb(cr2, sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1583

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

1585

cr2 = readb(port->membase + UARTCR2) & ~UARTCR2_SBK;

drivers/tty/serial/fsl_lpuart.c

1588

cr2 |= UARTCR2_SBK;

drivers/tty/serial/fsl_lpuart.c

1590

writeb(cr2, port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1629

u8 fifo, cr2, cr2_saved;

drivers/tty/serial/fsl_lpuart.c

1631

cr2 = readb(sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1632

cr2_saved = cr2;

drivers/tty/serial/fsl_lpuart.c

1633

cr2 &= ~(UARTCR2_TIE | UARTCR2_TCIE | UARTCR2_TE |

drivers/tty/serial/fsl_lpuart.c

1635

writeb(cr2, sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1662

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

1666

cr2 = readb(sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1667

cr2 |= UARTCR2_RIE | UARTCR2_RE | UARTCR2_TE;

drivers/tty/serial/fsl_lpuart.c

1668

writeb(cr2, sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1946

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

1952

cr2 = readb(port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

1953

cr2 &= ~(UARTCR2_TE | UARTCR2_RE |

drivers/tty/serial/fsl_lpuart.c

1955

writeb(cr2, port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

2509

u8 old_cr2, cr2;

drivers/tty/serial/fsl_lpuart.c

2519

cr2 = old_cr2 = readb(sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

2520

cr2 |= UARTCR2_TE | UARTCR2_RE;

drivers/tty/serial/fsl_lpuart.c

2521

cr2 &= ~(UARTCR2_TIE | UARTCR2_TCIE | UARTCR2_RIE);

drivers/tty/serial/fsl_lpuart.c

2522

writeb(cr2, sport->port.membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

446

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

448

cr2 = readb(port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

449

cr2 &= ~(UARTCR2_TIE | UARTCR2_TCIE);

drivers/tty/serial/fsl_lpuart.c

450

writeb(cr2, port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

464

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

466

cr2 = readb(port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

467

writeb(cr2 & ~UARTCR2_RE, port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

792

u8 cr2;

drivers/tty/serial/fsl_lpuart.c

794

cr2 = readb(port->membase + UARTCR2);

drivers/tty/serial/fsl_lpuart.c

795

writeb(cr2 | UARTCR2_TIE, port->membase + UARTCR2);

drivers/tty/serial/stm32-usart.c

1077

val = readl_relaxed(port->membase + ofs->cr2);

drivers/tty/serial/stm32-usart.c

1079

writel_relaxed(val, port->membase + ofs->cr2);

drivers/tty/serial/stm32-usart.c

1162

u32 cr1, cr2, cr3, isr, brr, presc;

drivers/tty/serial/stm32-usart.c

1195

cr2 = stm32_port->swap ? USART_CR2_SWAP : 0;

drivers/tty/serial/stm32-usart.c

1208

cr2 |= USART_CR2_STOP_2B;

drivers/tty/serial/stm32-usart.c

1253

cr2 |= USART_CR2_RTOEN;

drivers/tty/serial/stm32-usart.c

1381

writel_relaxed(cr2, port->membase + ofs->cr2);

drivers/tty/serial/stm32-usart.c

48

.cr2 = 0x10,

drivers/tty/serial/stm32-usart.c

66

.cr2 = 0x04,

drivers/tty/serial/stm32-usart.c

89

.cr2 = 0x04,

drivers/tty/serial/stm32-usart.h

13

u16 cr2;

fs/btrfs/send.c

1289

const struct clone_root *cr2 = e2;

fs/btrfs/send.c

1291

if (btrfs_root_id(cr1->root) < btrfs_root_id(cr2->root))

fs/btrfs/send.c

1293

if (btrfs_root_id(cr1->root) > btrfs_root_id(cr2->root))

fs/nfsd/nfs4state.c

2782

same_creds(struct svc_cred *cr1, struct svc_cred *cr2)

fs/nfsd/nfs4state.c

2784

if ((is_gss_cred(cr1) != is_gss_cred(cr2))

fs/nfsd/nfs4state.c

2785

|| (!uid_eq(cr1->cr_uid, cr2->cr_uid))

fs/nfsd/nfs4state.c

2786

|| (!gid_eq(cr1->cr_gid, cr2->cr_gid))

fs/nfsd/nfs4state.c

2787

|| !groups_equal(cr1->cr_group_info, cr2->cr_group_info))

fs/nfsd/nfs4state.c

2790

if (cr1->cr_principal == cr2->cr_principal)

fs/nfsd/nfs4state.c

2792

if (!cr1->cr_principal || !cr2->cr_principal)

fs/nfsd/nfs4state.c

2794

return 0 == strcmp(cr1->cr_principal, cr2->cr_principal);

fs/smb/client/smb1pdu.h

2319

char cr2; /* \n */

sound/soc/stm/stm32_sai_sub.c

894

int imr, cr2, ret;

sound/soc/stm/stm32_sai_sub.c

919

stm32_sai_sub_reg_rd(sai, STM_SAI_CR2_REGX, &cr2);

sound/soc/stm/stm32_sai_sub.c

920

if (cr2 & SAI_XCR2_MUTECNT_MASK)

tools/arch/x86/include/uapi/asm/kvm.h

155

__u64 cr0, cr2, cr3, cr4, cr8;

tools/arch/x86/include/uapi/asm/kvm.h

166

__u64 cr0, cr2, cr3, cr4, cr8;

tools/testing/selftests/kvm/include/x86/svm.h

223

u64 cr2;

tools/testing/selftests/kvm/lib/x86/processor.c

143

sregs->cr0, sregs->cr2, sregs->cr3, sregs->cr4);

tools/testing/selftests/kvm/lib/x86/svm.c

117

asm volatile ("mov %%cr2, %0" : "=r"(save->cr2) : : "memory");

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

131

unsigned long cr2;