drivers/crypto/cavium/cpt/cptvf_reqmanager.c

283

sizeof(union cpt_res_s), DMA_BIDIRECTIONAL);

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

332

union cpt_res_s *status = NULL;

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

351

status = (union cpt_res_s *)pentry->completion_addr;

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

412

union cpt_res_s *result = NULL;

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

442

info->completion_addr = kzalloc(sizeof(union cpt_res_s), req->may_sleep ? GFP_KERNEL : GFP_ATOMIC);

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

449

result = (union cpt_res_s *)info->completion_addr;

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

453

sizeof(union cpt_res_s),

drivers/crypto/cavium/cpt/cptvf_reqmanager.c

457

sizeof(union cpt_res_s));

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

404

struct cpt_res_s *res)

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

432

struct cpt_res_s *res;

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

442

res = dma_alloc_coherent(pf->dev, sizeof(struct cpt_res_s),

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

450

dma_free_coherent(pf->dev, sizeof(struct cpt_res_s), res,

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

491

dma_free_coherent(pf->dev, sizeof(struct cpt_res_s), res, res_iova);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

936

struct cpt_res_s *res;

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

988

res = (struct cpt_res_s *)(sq->cpt_resp->base + (64 * sq->head));