ch_regs
atchan->ch_regs = atdma->regs + ch_regs(i);
void __iomem *ch_regs;
__raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
__raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
void __iomem *ch_regs;
atchan->ch_regs = at_xdmac_chan_reg_base(atxdmac, i);
#define at_xdmac_chan_read(atchan, reg) readl_relaxed((atchan)->ch_regs + (reg))
#define at_xdmac_chan_write(atchan, reg, value) writel_relaxed((value), (atchan)->ch_regs + (reg))
dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
void __iomem *ch_regs;
return dwc->ch_regs;
struct pch_dma_desc_regs ch_regs[MAX_CHAN_NR];
pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR);
pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR);
pd->ch_regs[i].size = channel_readl(pd_chan, SIZE);
pd->ch_regs[i].next = channel_readl(pd_chan, NEXT);
channel_writel(pd_chan, DEV_ADDR, pd->ch_regs[i].dev_addr);
channel_writel(pd_chan, MEM_ADDR, pd->ch_regs[i].mem_addr);
channel_writel(pd_chan, SIZE, pd->ch_regs[i].size);
channel_writel(pd_chan, NEXT, pd->ch_regs[i].next);
struct tegra_dma_channel_regs *ch_regs,
ch_regs->wcount = len_field;
ch_regs->csr |= len_field;
sg_req->ch_regs.apb_ptr = apb_ptr;
sg_req->ch_regs.ahb_ptr = mem;
sg_req->ch_regs.csr = csr;
tegra_dma_prep_wcount(tdc, &sg_req->ch_regs, len);
sg_req->ch_regs.apb_seq = apb_seq;
sg_req->ch_regs.ahb_seq = ahb_seq;
sg_req->ch_regs.apb_ptr = apb_ptr;
sg_req->ch_regs.ahb_ptr = mem;
sg_req->ch_regs.csr = csr;
tegra_dma_prep_wcount(tdc, &sg_req->ch_regs, len);
sg_req->ch_regs.apb_seq = apb_seq;
sg_req->ch_regs.ahb_seq = ahb_seq;
struct tegra_dma_channel_regs ch_regs;
struct tegra_dma_channel_regs *ch_regs = &sg_req->ch_regs;
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq);
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT, ch_regs->wcount);
ch_regs->csr | TEGRA_APBDMA_CSR_ENB);
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, nsg_req->ch_regs.ahb_ptr);
nsg_req->ch_regs.wcount);
nsg_req->ch_regs.csr | TEGRA_APBDMA_CSR_ENB);
struct tegra_adma_chan_regs ch_regs;
struct tegra_adma_chan_regs ch_regs;
struct tegra_adma_chan_regs *ch_regs;
ch_regs = &desc->ch_regs;
tdma_ch_write(tdc, ADMA_CH_TC - tdc->tdma->cdata->ch_tc_offset_diff, ch_regs->tc);
tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
ch_regs->src_addr);
ch_regs->trg_addr);
tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);
tdma_write(tdc->tdma, tdc->global_ch_fifo_offset, ch_regs->fifo_ctrl);
tdma_write(tdc->tdma, tdc->global_ch_config_offset, ch_regs->global_config);
tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config);
struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;
ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);
ch_regs->ctrl |= (1 << ADMA_CH_CTRL_XFER_PAUSE_SHIFT);
tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;
ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);
ch_regs->ctrl &= ~(1 << ADMA_CH_CTRL_XFER_PAUSE_SHIFT);
tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
residual = desc->ch_regs.tc;
struct tegra_adma_chan_regs *ch_regs = &desc->ch_regs;
ch_regs->config = ADMA_CH_CONFIG_SRC_BUF(desc->num_periods - 1);
ch_regs->ctrl = ADMA_CH_REG_FIELD_VAL(tdc->sreq_index,
ch_regs->src_addr = buf_addr;
ch_regs->config = ADMA_CH_CONFIG_TRG_BUF(desc->num_periods - 1);
ch_regs->ctrl = ADMA_CH_REG_FIELD_VAL(tdc->sreq_index,
ch_regs->trg_addr = buf_addr;
ch_regs->ctrl |= ADMA_CH_CTRL_DIR(adma_dir, cdata->ch_dir_mask,
ch_regs->config |= cdata->adma_get_burst_config(burst_size);
ch_regs->global_config |= cdata->ch_config;
ch_regs->config |= cdata->ch_config;
ch_regs->fifo_ctrl =
ch_regs->fifo_ctrl =
ch_regs->tc = desc->period_len & ADMA_CH_TC_COUNT_MASK;
ch_reg = &tdc->ch_regs;
ch_reg = &tdc->ch_regs;
dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch];
dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch];
return dc->ch_regs;
return dc->ch_regs;
void __iomem *ch_regs;
return readl_relaxed(mc->ch_regs[ch] + offset);
writel_relaxed(value, mc->ch_regs[ch] + offset);
mc->ch_regs = devm_kcalloc(mc->dev, mc->soc->num_channels, sizeof(*mc->ch_regs),
if (!mc->ch_regs)
mc->ch_regs[i] = devm_platform_ioremap_resource_byname(pdev, name);
if (IS_ERR(mc->ch_regs[i]))
return PTR_ERR(mc->ch_regs[i]);
void __iomem **ch_regs;