arch/arm/mach-omap1/time.c

193

if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,

arch/arm/mach-omap1/timer32k.c

238

ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,

arch/arm/mach-spear/time.c

89

clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate,

arch/arm/plat-orion/time.c

227

clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource",

drivers/clocksource/armv7m_systick.c

60

ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate,

drivers/clocksource/asm9260_timer.c

227

clocksource_mmio_init(priv.base + HW_TC1, DRIVER_NAME, rate,

drivers/clocksource/bcm2835_timer.c

91

clocksource_mmio_init(base + REG_COUNTER_LO, node->name,

drivers/clocksource/clksrc_st_lpc.c

54

ret = clocksource_mmio_init(ddata.base + LPC_LPT_LSB_OFF,

drivers/clocksource/clps711x-timer.c

36

clocksource_mmio_init(tcd, "clps711x-clocksource", rate, 300, 16,

drivers/clocksource/jcore-pit.c

167

err = clocksource_mmio_init(jcore_pit_base, "jcore_pit_cs",

drivers/clocksource/mps2-timer.c

225

ret = clocksource_mmio_init(base + TIMER_VALUE, name,

drivers/clocksource/mxs_timer.c

195

clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1),

drivers/clocksource/nomadik-mtu.c

220

ret = clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",

drivers/clocksource/renesas-ostm.c

69

return clocksource_mmio_init(timer_of_base(to) + OSTM_CNT,

drivers/clocksource/timer-armada-370-xp.c

297

res = clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,

drivers/clocksource/timer-digicolor.c

185

clocksource_mmio_init(dc_timer_dev.base + COUNT(TIMER_B), node->name,

drivers/clocksource/timer-econet-en751221.c

194

ret = clocksource_mmio_init(reg_count(0), np->name,

drivers/clocksource/timer-ep93xx.c

167

clocksource_mmio_init(NULL, "timer4",

drivers/clocksource/timer-fsl-ftm.c

217

err = clocksource_mmio_init(priv->clksrc_base + FTM_CNT, "fsl-ftm",

drivers/clocksource/timer-fttmr010.c

359

clocksource_mmio_init(fttmr010->base + TIMER2_COUNT,

drivers/clocksource/timer-fttmr010.c

367

clocksource_mmio_init(fttmr010->base + TIMER2_COUNT,

drivers/clocksource/timer-gx6605s.c

125

return clocksource_mmio_init(base + TIMER_VALUE, "gx6605s",

drivers/clocksource/timer-gxp.c

126

ret = clocksource_mmio_init(system_clock, node->name, freq,

drivers/clocksource/timer-imx-gpt.c

166

return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,

drivers/clocksource/timer-imx-tpm.c

166

return clocksource_mmio_init(timer_base + TPM_CNT,

drivers/clocksource/timer-integrator-ap.c

41

ret = clocksource_mmio_init(base + TIMER_VALUE, "timer2",

drivers/clocksource/timer-ixp4xx.c

196

clocksource_mmio_init(NULL, "OSTS", timer_freq, 200, 32,

drivers/clocksource/timer-lpc32xx.c

193

ret = clocksource_mmio_init(base + LPC32XX_TIMER_TC, "lpc3220 timer",

drivers/clocksource/timer-mediatek.c

325

clocksource_mmio_init(timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC),

drivers/clocksource/timer-meson6.c

178

clocksource_mmio_init(timer_base + MESON_ISA_TIMERE, node->name,

drivers/clocksource/timer-milbeaut.c

179

clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS,

drivers/clocksource/timer-msc313e.c

224

return clocksource_mmio_init(timer_of_base(&to), TIMER_NAME, timer_of_rate(&to), 300, 32,

drivers/clocksource/timer-npcm7xx.c

182

clocksource_mmio_init(timer_of_base(&npcm7xx_to) +

drivers/clocksource/timer-orion.c

156

ret = clocksource_mmio_init(timer_base + TIMER0_VAL,

drivers/clocksource/timer-owl.c

150

ret = clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name,

drivers/clocksource/timer-pxa.c

164

ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,

drivers/clocksource/timer-ralink.c

137

ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,

drivers/clocksource/timer-rockchip.c

270

ret = clocksource_mmio_init(rk_clksrc->base + TIMER_CURRENT_VALUE0,

drivers/clocksource/timer-sp804.c

154

clocksource_mmio_init(clkevt->value, name,

drivers/clocksource/timer-stm32.c

263

return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name,

drivers/clocksource/timer-sun4i.c

193

ret = clocksource_mmio_init(timer_of_base(&to) + TIMER_CNTVAL_REG(1),

drivers/clocksource/timer-tegra.c

336

ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,

drivers/clocksource/timer-zevio.c

192

clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,

include/linux/clocksource.h

284

extern int clocksource_mmio_init(void __iomem *, const char *,