clk_round_rate
EXPORT_SYMBOL(clk_round_rate);
if (clk_round_rate(c, 48000000) != 48000000) {
pfc = clk_round_rate(c, 50000000);
EXPORT_SYMBOL_GPL(clk_round_rate);
EXPORT_SYMBOL(clk_round_rate);
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_set_rate(clk, clk_round_rate(clk, 166000000));
clk_round_rate(camera_clk, CEU_MCLK_FREQ));
clk_set_rate(video_clk, clk_round_rate(video_clk, 10000000));
clk_set_rate(clk, clk_round_rate(clk, 83333333));
best_parent_rate = clk_round_rate(pclk->clk, 1);
best_parent_rate = clk_round_rate(pclk->clk, req->rate * div);
long pll_rate = clk_round_rate(pll, target_rate);
EXPORT_SYMBOL_GPL(clk_round_rate);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
rounded = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);
rounded = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);
KUNIT_ASSERT_EQ(test, DUMMY_CLOCK_RATE_2, clk_round_rate(clk, DUMMY_CLOCK_RATE_2));
rounded_rate = clk_round_rate(clk, other_parent_rate);
rounded_rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1);
rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);
req->rate = clk_round_rate(cpu->pll, req->rate);
r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
gclk_round = clk_round_rate(timer->gclk, max_rate);
min = roundup(clk_round_rate(clk, 0), RASPBERRYPI_FREQ_INTERVAL);
max = roundup(clk_round_rate(clk, ULONG_MAX), RASPBERRYPI_FREQ_INTERVAL);
r = clk_round_rate(policy->clk, freq->frequency * 1000);
(clk_round_rate(cpuclk, 1) + 500) / 1000;
(clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
freq = clk_round_rate(cpuclk, target->freq * 1000);
policy->min = (clk_round_rate(cpuclk, 1) + 500) / 1000;
policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
newfreq = clk_round_rate(srcclk, newfreq * mult);
rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
return clk_round_rate(mdev->aclk, min_aclk);
if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) {
if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) {
adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk,
rate = clk_round_rate(hdlcd->clk, clk_rate);
rate = clk_round_rate(hwdev->pxlclk, req_rate);
real_clk_hz = clk_round_rate(clk, desired_hz);
round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);
rounded_rate = clk_round_rate(dsi->clk_pixel, pixel_clock_rate);
rounded_rate = clk_round_rate(dsi->clk_pixel, pixel_clock_rate);
rounded_refclk = clk_round_rate(hdmi->refclk, mpixelclk);
clk_round_rate(ctx->ade_pix_clk, mode->clock * 1000) / 1000;
rounded_rate = clk_round_rate(fg->clk_disp, clk_khz * HZ_PER_KHZ);
rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
rate = clk_round_rate(priv->pix_clk, mode->clock * 1000);
lcd_freq = clk_round_rate(mcde->fifoa_clk, mode->clock * 1000);
d->lp_freq = clk_round_rate(d->lp_clk, lp_freq);
d->hs_freq = clk_round_rate(d->hs_clk, hs_freq);
return clk_round_rate(mdp4_dtv_encoder->mdp_clk, rate);
actual = clk_round_rate(mdp4_lcdc_encoder->lcdc_clk, requested);
vsync_clk_speed = clk_round_rate(mdp5_kms->vsync_clk, VSYNC_CLK_RATE);
clk_round_rate(mdp5_kms->vsync_clk, VSYNC_CLK_RATE));
actual = clk_round_rate(hdmi->extp_clk, tmds_rate);
clk->new_rate = clk_round_rate(clk->clk, target_rate) / GK20A_CLK_GPC_MDIV;
fck = clk_round_rate(dss->dss_clk, fck);
fck = clk_round_rate(dss->dss_clk, max_dss_fck);
rate = clk_round_rate(clk, target);
int rpclk = clk_round_rate(hdmi->ref_clk, pclk);
int rpclk = clk_round_rate(hdmi->hdmiphy_clk, pclk);
rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000);
rate = clk_round_rate(vop->dclk,
result = clk_round_rate(dvo->clk_pix, target);
result = clk_round_rate(hda->clk_pix, target);
result = clk_round_rate(hdmi->clk_pix, target);
result = clk_round_rate(ldev->lvds_clk, target);
result = clk_round_rate(ldev->pixel_clk, target);
rounded_rate = clk_round_rate(hdmi->tmds_clk, clock);
rounded_rate = clk_round_rate(tcon->dclk, rate);
err = clk_round_rate(parent, pclk * 4);
round_clock = clk_round_rate(dispc->vp_clk[hw_videoport], clock);
round_clock = clk_round_rate(oldi->serial, mode->clock * 7 * 1000);
rate = clk_round_rate(arcpgu->clk, clk_rate);
r_clk = clk_round_rate(st->clk, val);
tmp = clk_round_rate(st->clk, readin);
actual_rate = clk_round_rate(kp->clk, desired_rate);
rate = clk_round_rate(clock->clk, clock->freq[j]);
round_rate = clk_round_rate(clock->clk, clock->freq[j]);
rate = clk_round_rate(clock->clk, clock->freq[j]);
ret = clk_round_rate(host->ciu_clk, freqs[i] * RK3288_CLKGEN_DIV);
host->mmc->f_min = clk_round_rate(host->mmc_clk, 400000);
mmc->f_min = clk_round_rate(host->sd_clk, 1);
mmc->f_max = clk_round_rate(host->sd_clk, ULONG_MAX);
mmc->f_min = clk_round_rate(host->cfg_div_clk, 1);
mmc->f_max = clk_round_rate(host->cfg_div_clk, ULONG_MAX);
mmc->f_min = clk_round_rate(host->clk, 100000);
clk_rate = clk_round_rate(owl_host->clk, rate << 1);
mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
freq = clk_round_rate(ref_clk, new_clock << i);
freq = clk_round_rate(ref_clk, (new_clock << i) / 4 * 3);
return clk_round_rate(core_clk, ULONG_MAX);
return clk_round_rate(pltfm_host->clk, ULONG_MAX);
rate = clk_round_rate(clksrc, wanted);
rate = clk_round_rate(clk, ULONG_MAX);
rate = clk_round_rate(clk, 0);
return clk_round_rate(sprd_host->clk_sdio, ULONG_MAX);
return clk_round_rate(pltfm_host->clk, UINT_MAX);
f_min = clk_round_rate(host->clk, f_min_old / 2);
freq = clk_round_rate(host->clk, clk * div);
rate = clk_round_rate(host->clk_mmc, clock);
clk_rate = clk_round_rate(r->clock[0], hw->clk_rate);
rate_round = clk_round_rate(host->clk, rate);
rate_round = clk_round_rate(host->clk, rate);
real_clk_rate = clk_round_rate(nfc->mod_clk, sunxi_nand->clk_rate);
rate_rounded = clk_round_rate(bp->tx_clk, rate);
freq = clk_round_rate(opp_table->clk, target_freq);
rate = clk_round_rate(clk, tmp);
fin_freq = clk_round_rate(channel->clk, freq);
if (required_clk_rate > clk_round_rate(pc->clk, required_clk_rate))
EXPORT_SYMBOL_GPL(clk_round_rate);
freq = clk_round_rate(se->clk, freq + 1);
clk_min_rate = clk_round_rate(clk, 0);
clk_max_rate = clk_round_rate(clk, ULONG_MAX);
clk_rate = clk_round_rate(clk, clk_rate);
tclk_rate = clk_round_rate(rspi->tclk, 0);
tclk_rate = clk_round_rate(rspi->tclk, ULONG_MAX);
clk_rate = clk_round_rate(bgp->div_clk,
rate = clk_round_rate(d->clk, newrate);
gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud);
target = clk_round_rate(msm_port->clk, 16 * baud);
target = clk_round_rate(msm_port->clk, old + 1);
*freq = (unsigned long) clk_round_rate(clki->clk, *freq);
r = clk_round_rate(c, pc);
fck = clk_round_rate(dss.dss_clk, fck);
fck = clk_round_rate(dss.dss_clk, max_dss_fck);
rate = clk_round_rate(drvdata->clk, 1);
long clk_round_rate(struct clk *clk, unsigned long rate);
struct cmd_clk_round_rate_request clk_round_rate;
struct cmd_clk_round_rate_response clk_round_rate;
round_rate = clk_round_rate(clk, rate);
round_rate = clk_round_rate(dd->gclk,
freq = clk_round_rate(da7213->mclk, freq);
freq = clk_round_rate(da7218->mclk, freq);
freq = clk_round_rate(da7219->mclk, freq);
bclk_rate = clk_round_rate(bclk, bclk_rate);
freq = clk_round_rate(max98088->mclk, freq);
freq = clk_round_rate(max98090->mclk, freq);
freq = clk_round_rate(max98095->mclk, freq);
freq = clk_round_rate(nau8825->mclk, freq);
if (clk_round_rate(clocks[0].clk, dac_clock_rate) == 0)
rate_actual = clk_round_rate(clk, rate_ideal);
clkrate = clk_round_rate(ssi->baudclk, tmprate);
pre_div_a = clk_round_rate(i2s->clk_ref, rate * 256);
pre_div_b = clk_round_rate(i2s->clk_ref, rate * 384);
pre_div_a = clk_round_rate(spdif->clk_ref, rate * 256);
pre_div_b = clk_round_rate(spdif->clk_ref, rate * 384);
ret = clk_set_rate(div, clk_round_rate(div, best_act));
cout = clk_round_rate(ick, cout);
clk = clk_round_rate(pdm->clk, PDM_SIGNOFF_CLK_RATE);
rate = clk_round_rate(pdm->clk, clkref[i].clk);
i2s_new_rate = clk_round_rate(i2s->i2sclk, i2s_clk_rate);
sai_new_rate = clk_round_rate(sai->sai_ck, sai_ck_rate);
status = clk_round_rate(chip->board->dac_clk, dac_rate_new);